ECE 2030 Exam I - September 15th, 2009, Exams of Computer Science

Information about an electrical and computer engineering (ece) exam, including the exam date, honor code, number of questions, page count, instructions, and problem points. The exam covers topics such as binary representation, transistor implementation, cmos design, and mixed logic design.

Typology: Exams

2012/2013

Uploaded on 04/08/2013

sekhar_p43
sekhar_p43 🇮🇳

5

(2)

152 documents

1 / 12

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
ECE 2030 F
Exam I
September 15th, 2009
1. The Georgia Tech Honor Code governs this examination.
2. There are 8 questions and 12 pages including two blank worksheets and the
ASCII table. Make sure you have all of them.
3. Please write/draw legibly. Use the work sheets for generating the solutions before
providing the final answer.
4. State any assumptions you feel you have to make or ask for clarification
5. Keep in mind it is difficult to give partial credit without written material. Please
make sure you document any partial solutions.
6. The exam is closed notes, closed text, no calculators and no helper sheet.
7. The exam is 80 minutes
8. Plan your work! Points are noted next to each problem.
Problem Max Points Graded
1 10
2 5
3 10
4 10
5 10
6 10
7 10
8 10
Total 75
Student Name: __________________________________
Student Number: ________________________________
pf3
pf4
pf5
pf8
pf9
pfa

Partial preview of the text

Download ECE 2030 Exam I - September 15th, 2009 and more Exams Computer Science in PDF only on Docsity!

ECE 2030 F

Exam I

September 15

th

  1. The Georgia Tech Honor Code governs this examination.
  2. There are 8 questions and 12 pages including two blank worksheets and the ASCII table. Make sure you have all of them.
  3. Please write/draw legibly. Use the work sheets for generating the solutions before providing the final answer.
  4. State any assumptions you feel you have to make or ask for clarification
  5. Keep in mind it is difficult to give partial credit without written material. Please make sure you document any partial solutions.
  6. The exam is closed notes, closed text, no calculators and no helper sheet.
  7. The exam is 80 minutes 8. Plan your work! Points are noted next to each problem.

Problem Max Points Graded 1 10 2 5 3 10 4 10 5 10 6 10 7 10 8 10 Total 75

Student Name: __________________________________

Student Number: ________________________________

  1. Fill in the missing entries in the following table

Decimal 4-bit Binary 8-bit Binary 1000 11

  1. Say you were provided with the sequence of binary numbers below and told it was an ASCII string. Decode this string.
  1. The following is a correct CMOS implementation of a Boolean function F.

However, you are told it is inefficient and F can be implemented with a smaller number of transistors. Provide a CMOS transistor implementation that computes F but uses less number of transistors.

A

B

A

C

C

B

A B C

A B^ C

Vdd

F

  1. The following circuit was designed using a mixed logic design methodology. Re- implement this circuit using only using only 2-input NOR gates and inverters. Compare the two circuits in terms of the number of transistors.

F

B D

D

A

C

  1. Construct any truth table on 3 variables, A, B, and C (the function should not evaluate to all 0 or all 1). For this truth table provide the following.

a. The Boolean expression in Sum of Minterms (SOM) form

F = _____________________________________________________

b. The Boolean expression in Product of Maxterms form

F = _____________________________________________________

ASCII TABLE - PART I