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Module Learning Objectives
Digital Logic & Circuits
Background
History and Terminology
Module 1: Part 1 (M1.1)
Identify key events, players, and timeline in the history of digital systems
Use common professional terminology to describe digital systems
Compare and contrast microprocessor, microcontroller, and embedded
system
ECE 331
Prof. Nihar Mahapatra
(adapted from Prof. A. Mason’s lecture notes; other sources listed at the end)
Timeline of Computer History Highlights M1: Digital Logic & Circuits
2
~2500 BC Sumer (Sumerian) Abacus - First calculating tool
~1623 AD Wilhelm Schickard (and others including Blaise Pascal)
First mechanical calculator: addition, subtraction, multiplication, and division (not programmable)
1830s Charles Babbage First concept and design of a fully programmable mechanical computer 1937 Alan Turing Concept of the algorithm and computation with the Turing machine 1940s (WWII)
First plans for an electrical computer (not planned for personal use) 1946 John Mauchly and J. Presper Eckert (Univ. Penn, U.S. Army)
ENIAC (Electronic Numerical Integrator & Computer). First electronic general-purpose computer. Used relays & vacuum tubes
1947 Bardeen, Brattain, and William Shockley (Bell Labs)
First semiconductor transistor; the beginning of microelectronics age
1958 Jack Kilby (Texas Instruments) won Nobel Prize in 2000
First integrated circuit (multiple transistors in one substrate); built in germanium 1959 Robert Noyce (Fairchild Semiconductor)
First silicon integrated circuit
1971 Intel Intel 4004 (4-bit CPU) - First commercial single-chip microprocessor
MECHANICAL
ELECTRONIC
SEMICONDUCTOR
Highlights of Computer History M1: Digital Logic & Circuits
3
~2500 BC Abacus - First calculating machine ~1623 AD First mechanical calculator
1830s First programmable mechanical computer (Babbage) 1937 Algorithm concept; Turing machine 1940s (WWII)
First electrical computer plans
1946 ENIAC: First general-purpose electronic computer 1947 First semiconductor transistor; begins microelectronics age 1958 First integrated circuit
1971 First microprocessor (Intel 4004) 1973 1993
1 st^ cellular phone (Motorola) 1 st^ smart phone (IBM & BellSouth)
MECHANICAL
ELECTRONIC
SEMICONDUCTOR
Next generation digital systems
- forged by Computer Engineers
RF
Microelectronics Terminology
Semiconductor
o == material capable of conductive & non-conductive states
o Silicon (Si): most common semiconductor material in chips today
o Other special purposes materials (SiGe, GaAs, GaInAs): LED
Transistor
o == electronic device capable of switching current ON/OFF
Integrated circuit (IC)
o Multiple semiconductor transistors
on a single substrate (chip)
MOSFET
o == metal oxide semiconductor field effect transistor
o Most common modern semiconductor transistor
CMOS
o == complementary metal oxide semiconductor
o Most common technology for modern ICs
o State-of-the-art feature size: 14 nm
- human hair is ~ 100,000nm
- countable number of atoms separate input from output!
M1: Digital Logic & Circuits
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metal oxide semiconductor
Digital System Terminology
Logic Gate
o Circuit capable of performing logic (binary mathematics) operations
o INV, AND, OR
- Even complex logic operations can be performed with these basic gates
o NAND, NOR, XOR, XNOR, etc.
- All logic operations can be formed with NAND or NOR gates Even a full microprocessor!
FPGA
o == field programmable gate array
o Chip comprised of large array of simple logic gates, interconnects
- Can be connected (via programming) to perform nearly any digital tasks
o Hardware whose function is determined by a (VHDL/Verilog) program
- Thus can be reprogrammed ideal for prototyping
o Good for application-specific functions (e.g., logic to interface to another digital
system)
- Can run faster than same function in software
7
ECE 410 teaches how to build a microprocessor starting with NAND gates. Cool, eh?
ECE 411 teaches how to implement digital functions in FPGA using VHDL. Nifty!
Digital System Terminology
Arithmetic logic unit (ALU)
o Collection of logic gates capable of arithmetic and logical operations o Performs fundamental operations on 1 or 2 binary inputs
- AND, XOR, Add, Subt, Decrement
Central processing unit (CPU)
o Control unit: collection of logic gates that forms the “thinking” engine of a computer o Includes an ALU and local data registers (register file)
Microprocessor (μP)
o Single IC CPU with limited memory & I/O, and typically floating point processor
- I/O input/output, e.g., serial & parallel ports o Ex: Intel Core/Xeon, AMD K
Microcontroller (μC or MCU)
o Single IC CPU with significant on-chip memory & I/O
- I/O: data ports, USB, timers, A/D converter o Ex: PIC24, TI MSP430, ARM Cortex
M1: Digital Logic & Circuits
8
Compare μC & μP
o Cost
- μC is cheap (~$10), μP is expensive (~$100)
- Many more low-bit (8-16b) μC’s in the world than large-word (32-64b) μP’s o Computation
- μP = high performance, μC = low performance μP has larger word length ALU and faster clocks μP (32-64b, GHz); μC (8-16b, MHz) o Memory
- μC built-in program memory, μP limited o I/O Devices = “peripheral” hardware
- μC built-in I/O hardware, μP limited
Today
o Growth of high volume, mid-performance products like cell phones and tablets have blurred the distinction somewhat
- now many application-specific μP/μC hybrids o Bottom line
- μP is for volume computing
- μC is for interfacing with real world o Many consumer products today have multiple μPs & μCs
- graphics processors, speech encoders, etc.
ARM University Program Copyright © ARM Ltd 2013 9
Microcontroller vs. Microprocessor
Both have a CPU core to
execute instructions
Microcontroller has
peripherals for
concurrent embedded
interfacing and control
Analog Non-logic level
signals
Timing Clock generators Communications
point to point
network
Reliability
and safety
Peripherals = hardware blocks that implement useful functions. Also called I/O devices
Module Learning Objectives
Digital Logic & Circuits
Background
Binary Numbers and Boolean
Algebra
Module 1: Part 2 (M1.2)
Express numbers in binary and hexadecimal form and convert between number bases. Perform binary arithmetic Express numbers in signed 2’s complement (S2C) form, perform 2’s complement operation, and evaluate subtraction using S2C. Identify value range in S2C and determine 2C overflow Perform minimization of logic expressions using minimax terms, K-maps, and Boolean arithmetic Utilize flow charts to illustrate processes and algorithms
ECE 331
Prof. Nihar Mahapatra
(adapted from Prof. A. Mason’s lecture notes)
Unsigned Binary Addition
Adding binary values
o is just like adding decimal values, but each digit of the result can only have a binary value
- 0+0 0, 0+1 1
- 1+1 1 0, where the 1 is a carry to next bit o Ex: Bitwise binary addition
Addition examples in all bases
Value Range
o n unsigned binary bits only express values 0 to 2 n- 1 , Ex: 4-bit Bin has range 0- 15 o n unsigned hex digits express values 0 to 16 n- 1 13
Adding values can generate a result
that is outside the range of input digits
o 4 - bit Bin range =0- 15 1610 = out of range
Out of Range
o In digital hardware (ALU, CPU), values outside of a variable’s range generate a range overflow bit beyond MSB o unsigned overflow bit is called carry_bit or carry_out
(unsigned) Binary range line graph
Decimal 7
7 0111 4 0100
Binary 0111
01112 (^716) 01002 (^416)
Hex 7
Decimal 7
7 0111 9 1001
Binary 0111
01112 (^716) 10012 (^916)
Hex 7
1 1 carry_out
A
B
A+B
A
B
A+B
bit carry
n-bit unsigned value
0 2 n- 1
invalid (negative)
out of valid^ range
Unsigned Binary Subtraction
Subtracting binary values
o is just like subtracting decimal values, but each digit of the result can only have a binary value
- 0 - 0 0, 1 - 0 1, 1- 1 0
- 0 - 1 x 0 , where the x indicates a “borrow” from the next higher bit
Borrow
o Mechanism of unsigned subtraction o Indicates that subtrahend (2nd^ number) is larger than the minuend (1st^ number)
- Ex: A-B, if B>A, a borrow is needed
- Ex: decimal: 99 1 99, borrow 100
- 100 100
- 99, borrow makes result negative o From this example, we see:
- If the result of an unsigned subtraction is negative, a borrow must have occurred
- and for unsigned values, a negative result would be out of range o thus, borrow indicates an invalid result
M1: Digital Logic & Circuits
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Subtraction and borrowing
o In subtracting A – B, either
- A = B zero result
- A > B positive result
- A < B negative result, borrow needed invalid result for unsigned binary o carry_out for subtracting A – B
- A B carry_out = 1, no borrow needed
- A < B carry_out = 0, borrow needed
- thus, carry_out = not_borrow (~borrow) carry_out and borrow are logical inverses
Status Flags (Condition Codes)
o Microcontrollers determine “status codes” or “flags” after each instruction execution o Carry Flag (C) : indicates unsigned binary result is out of range
- Related to carry_out of operation result
- Microcontrollers implement C-flag differently o for ARM microcontrollers
- Carry Flag (C) = carry_out
- for addition: C = 1 means out of range
- for subtraction: C = 0 means borrow occurred and result is negative & invalid
0 2 n- 1
C = 0 carry_out=
C= carry_out=
Signed Binary Values
Sign-Magnitude form
o MSB is sign bit: 0 = positive, 1 = negative o all other bits are the magnitude o Ex: 1011 - 3 o but this form is rarely used in microcontrollers
Signed Two’s Complement form (S2C)
o MSB is sign bit : 0 = positive, 1 = negative o if positive
- other bits are the magnitude
- Ex: 0101 + o if negative
- other bits are two’s complement of the value see next column
- Ex: 1101 - [101]* = - (010+1) = - (011) = - 3
Signed Value Range
o values in S2C form have a range of
- 2 n-^1 to 2 n-^1 - 1
- ~½ the magnitude of unsigned
- 4b signed values: - 8 to 7 15
Two’s Complement operation = 2C
o if [X]* is 2C of X o then [X]* = 𝑋+1,
- Ex: [0101]* = 1010+1 = 1011
2C operation vs. S2C form
o just because a # is in S2C, you only need to perform 2C operation if you want to know the decimal value o Digital hardware does not care what the decimal value is and will keep values in S2C form o ECE 331 students have historically had trouble with this and often try to perform 2C operation on any value in S2C form
- only perform 2C when YOU want the decimal value (or are instructed to); otherwise leave it alone!
n-bit signed value
out of range valid out of range
When to perform Two’s Complement operation
Just because a number is in S2C form,
you do not necessarily need to perform
two’s complement operation
Only perform two’s complement
operation when:
o You are asked to find the two’s
complement of a bin/hex value
o When you have to put a negative
decimal value into S2C form
o You are performing subtraction
- in which case you should two’s
complement the subtracted number
( subtrahend ) only if it is positive? YES! if it is negative? YES!
o You want to know the decimal value of a
negative S2C value
- in which case you drop the sign bit and take two’s complement of the remaining (magnitude) bits
M1: Digital Logic & Circuits
16
When NOT to perform two’s
complement: (common mistake)
o when a S2C arithmetic result is negative
- to remain in S2C form, a negative result must stay in S2C form without being converted o if you want to check the decimal value, go ahead, but don’t change the result out of S2C form
When does a microprocessor perform
two’s complement?
o when instructed to
- two’s complement is a common assembly language instruction o during subtraction, on the subtrahend o but never on a result
- (result = output of operation/instruction)
- it does not care what the decimal value is!
Signed vs. Unsigned Overflow
C = carry flag
o Determined by result of unsigned operation o for ARM controllers, C = carry_out, always o for unsigned addition
- C = 1 indicates unsigned overflow result is out of range and invalid o for unsigned subtraction
- C = 0 indicates a borrow has occurred result is negative and invalid o thus, to determine if a result is valid, programmer must know both the operation performed and the result’s C-flag
V = overflow flag
o Determined by result of signed operation
- when values are in S2C form o For signed addition
- V = 1 indicates result is out of S2C range o For signed subtraction
- V = 1 indicates result is out of S2C range
19
Which do I need, C or V?
o Microcontroller hardware does not know or care if the input values are signed or unsigned o Microcontrollers will automatically generate both C and V
- C generated assuming values were unsigned
- V generated assuming values were signed o Program (and programmer) responsible for knowing if input values were signed or not and thus which flag to look at after an operation
Another way to view C and V…
n-bit unsigned value
V=1 V=
valid 0 2 n- 1
C = 0 carry_out=
C= carry_out=
n-bit signed value
valid
Flag Examples
1) addition: 1110
Flags? N=, Z=, C=, V=
* signed: negative + negative = positive is not OK so V=
2) subtract: 1110 1110
Flags? N=, Z=, C=, V=
*unsigned: A>B no borrow, so C= because C = ~borrow
- signed: negative + positive = positive is OK so V=
3) subtract: 0110 0110
Flags? N=, Z=, C=, V=
- unsigned: A<B borrow, so C=0 (~borrow)
- signed: positive + positive = negative V=
M1: Digital Logic & Circuits
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4) addition: 1100
Flags? N=, Z=, C=, V=
5) subtract: 1000 1000
Flags? N=, Z=, C=, V=
*unsigned: A>B no borrow, so C=
- signed: negative + negative = positive is not OK so V=
6) subtract: 0010 0010
Flags? N=, Z=, C=, V=
- unsigned: A<B borrow, so C=0 (~borrow)
- signed: positive + negative = negative is OK so V=
Binary Math with Windows Calculator
Use Windows Calculator to check conversions & math
- only for checking answers!
- always show work in Preps
Open Windows calculator and choose View >> Programmer
Select number base (Hex, Dec, Bin)
o Ex: Bin
Enter values; hit ‘=‘ for result
o Ex: 1010 + 0011 = 1101
Convert to another base by selecting
new base
o Ex: Hex 1101 = D
21
Can use for S2C
Ex: in (Dec), enter - 26 then hit (Hex) DC
Logic Minimization
Often need to reduce a complex logic expression to its simplest form
o Simplest form generally means fewest number of logic operations
Methods of logic minimization
Boolean arithmetic using Boolean properties
o Ex
Karnaugh maps
o Ex: Find the minimal SoP expression for
o then reduce using Boolean arithmetic
F X Y Z X Y Z X Y Z^ Z ^ X Y
(^) XYZ
F ( 1 , 2 , 5 , 7 )^ XY
00 01 11 10 Z 0 m 2 1 m 1 m 7 m 5
F = XZ + Y’Z + X’YZ’ = Z(X+Y’) + X’YZ’ is the minimal form
M1: Digital Logic & Circuits
22
Basic Circuits Review
Topics from ECE
o review on your own as needed
current, voltage, resistance
power, energy
Ohm’s law
Kirchhoff’s laws
parallel & series equivalent resistances
25
Digital logic using CMOS transistors
binary outputs from transistor circuits
o on = closed = short o off = open
digital values vs. analog values
R
I V R = 1k
Battery V=3.7V Resistor
I = 3.7mA
0 1.3 2.0 5 V
Digital "0" Illegal "1"
Analog
Basic Digital Logic Gates
Inverter (INV); AKA not, negate, complement
o A ~A, o where ~A = “not A” = Ā = A’
Symbol
Truth table
“bubble” (circle) indicates NOT
o or “negative logic”; Lo = True, Hi = False
M1: Digital Logic & Circuits
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CMOS implementation of INV gate
o if input A is Low/False
- pMOS tx is ON/closed
- nMOS tx is OFF/open
- output ~A pulled Hi/True through pMOS o if input A is Hi/True
- pMOS tx is OFF/open
- nMOS tx is ON/closed
- output ~A pulled Lo/False through nMOS
A ~A
74HC
+3.3V
~A
n-type
p-type (^) source gate A
drain drain gate source
0 V active off +3.3V +3.3V off active 0V
A p-type n-type ~A
A 0 1
~A
A
74HC
+3.3V
~A
n-type
p-type source
gate
A
drain
drain
gate source
0 V active off +3.3V
+3.3V off active 0V
A p-type n-type ~A
A
bubble indicates inversion
~ indicates inversion
A ~A
74HC
+3.3V
~A
n-type
p-type (^) source gate A
drain
drain gate (^) source
0 V active off +3.3V +3.3V off active 0V
A p-type n-type ~A
A 0 1
~A
switch
logic
Basic Digital Logic Gates
AND, OR
o 2 - input logic operations, 1 logic output
AND
o AB = A&B (C code)
OR
o A+B = A|B (C code)
27
NAND, NOR
o 2 - input operations, 1 negative logic output
NAND
o AB = ~(A&B)
NOR
o A+B = ~(A|B)
Truth table
~ indicates inversion
C notation: A&B ~(A&B) A|B ~(A|B)
double, indicates Boolean operation
Logic operations on bytes
o bit-wise logic of multi-bit values byte result
o Boolean (T/F) operation 1 bit results
- 0 = False (0); any non-zero value is True (1)
More Digital Logic Gates
XOR, XNOR
o Exclusive OR/NOR
o Truth table
o Symbol
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Boolean algebra principles
o De Morgan’s relations
- algebraically & schematically
C notation: A^B ~(A^B)
Complete Set Concept
o notice: NAND = AND + NOT o all logic functions can be implemented with ONLY NAND (or ONLY NOR) o example: INV with NAND
o similarly, can make AND, OR, NOR with only NAND (or NOR) – even full μP! notice bubbles at the inputs = ~input
Bit Mask Table
Bit x o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 o 9 o 10 o 11 o 12 o 13 o 14 o 15 o 16 o 17 o 18 o 19 o 20 o 21 o 22 o 23 o 24 o 25 o 26 o 27 o 28 o 29 o 30 o 31
31
Examples
Binary mask for bits 1 and 5
o bit 1 = 2_0000. o bit 5 = 2_0010. o thus mask for bits 1 & 5 = 2_0010.
Hex bit mask for bits 14 and 22
o bit 14 = 0x0000. o bit 22 = 0x0040. o thus mask for bits 14 & 22 = 0x0040.
Hex bit mask for bits 31, 23, 9, 8 & 2
o bit 31 = 0x8000. o bit 23 = 0x0080. o bit 09 = 0x0000. o bit 08 = 0x0000. o bit 01 = 0x0000. o thus combined mask = 0x8080.
Dec, 2x o 1 o 2 o 4 o 8 o 16 o 32 o 64 o 128 o 256 o 512 o 1024 o 2048 o 4096 o 8192 o 16k o 32k o 64k o 128k o 256k o 512k o 1M o 2M o 4M o 8M o 16M o 32M o 64M o 128M o 256M o 512M o 1G o 2G
Hex Mask o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x o 0x1. o 0x2. o 0x4. o 0x8. o 0x10. o 0x20. o 0x40. o 0x80. o 0x100. o 0x200. o 0x400. o 0x800. o 0x1000. o 0x2000. o 0x4000. o 0x8000.
Binary o 0000. o 0000. o 0000. o 0000. o 0001. o 0010. o 0100. o 1000. o etc…
Logic Schematic Manipulation
DeMorgan’s
o notice bubble on output = ~output
o notice bubbles in input = ~inputs
o can manipulate logic functions with bubbles
Bubble pushing technique
o bubbles can float across a wire without changing the logic/function
- from an input to the attached output(s)
- from an output to the attached input(s)
o 2 bubbles can be added to any node (like double negative)
But why?!?
o real VLSI circuits are (typically) NAND or NOR based, so best to map all
functions to NAND-only (or NOR-only)
M1: Digital Logic & Circuits
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DeMorgan’s equiv. to OR/NOR
DeMorgan’s equiv. to a NAND
Transmission Gates and Logic
Transistor switch
o 2 states: determined by gate/control voltage
- open: output connected to input
- closed: output “floating” (no connection, unknown voltage)
Transmission gate switch
o combine pMOS and nMOS switch to pass hi/lo logic
o 3 states: pass 0, pass 1, open circuit (no connection) = high impedance = HiZ
Drawbridge analogy
o 1 = traffic one way
o 0 = traffic the other way
o bridge raised no traffic either way
33
1 0
in out
draw bridge
1
0
in out
draw bridge = 1
1 0
in out
draw bridge = 0
1
0
in out
draw bridge
= HiZ
Combinational Logic Functions
Buffer: signal isolation & drive
o inverter without the inversion
o in practice, formed by cascading INV gates
Tri-State (buffer/inverter)
o buffer (or inverter) with disabled state
- disabled state = high impedance (open) output
M1: Digital Logic & Circuits
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Multiplexer (MUX): select 1 from many
o example 4:1 MUX
Decoder
o only one “active” output o example 4:1 decoder o difference from MUX? o “active low” concept: signal active when Lo
- textbook: A* means A* is active when Lo
Do you understand active low?
Flip Flop
Flip flop is a synchronous circuit
o which means?
D-type master-slave flip flop
o 2 latches clocked at opposite phase
o latch level logic gate level
Other styles of flip flops
o JK flip flop
o Toggle flip flop
o state tables (not truth table)
Convertability
o function of D, JK, and T flip flops can be implemented with either a JK FF or a
DFF (and some additional logic)
37
State tables for D-type, JK, and T-type flip flops
CLK
EXAMPLE
EXAMPLE
Flip Flop Timing Diagrams
Timing diagram: map of digital output (& input) vs. time
o use state table to find output
o look at proper clock transition
o ignore input changes outside
clock transitions
Rising- vs. falling-edge triggered
o FF triggered by clock edge
o rising = positive = “up”
o falling = negative = “down”
M1: Digital Logic & Circuits
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CLK
D
Qp
Qn
CLK
- from truth table, positive or negative triggered?
- what is Q if positive triggered (Qp)?
- what is Q if negative triggered (Qn)?
Hold Reset Set Toggle
Assume +edge trigger
- function at each trigger?
- Q value at each trigger?
? S^ R?^? R^ T?^? T^ T?
Registers
Data registers
ostores block (byte/word) of digital data
ocomposed of flip flops or latches
oprovides “static” memory
oexample:
- 4b parallel-in parallel-out register
Shift register
ocan move data laterally (left-right)
between register bits
ocan input/output (or both) data serially
oexample:
- 4b serial-in parallel out shift register
MSB = most significant bit (left)
LSB = least significant bit (right)
39
4b input, D0,D1,D2,D3 = D[3:0]
4b output, Q[3:0]
all bits latch/store/hold the input at CLK
o at same time
not lose value over time
one after the other in time
4b Data Register
4b Shift Register
1b input, D
1b serial output, Q
o optional 4b parallel output, Q[3:0]
all bits latch next input at same time
MSB
MSB
LSB
LSB
Shift & Rotate
Shift
o move (left or right) each bit of a register to adjacent latch o load a preset value (normally 0) into the opened latch
Rotate
o move (left or right) each bit to adjacent latch //same as shift// o rotate exiting bits back into other side of register //different//
M1: Digital Logic & Circuits
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EXAMPLE
shift
right by 2?
rotate
left by 1?
