Combinational Circuits: Design, Analysis, and Applications, Lecture notes of Digital Logic Design and Programming

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1

Digital Logic Design

EE-

BESE-9A-Spring 2019

Chapter 4:

Combinational Logic

Department of Electrical Engineering, SEECS, NUST Dr Shahid Baqar

Acknowledgements

Air Cdre Engr Habeel Ahmed Vice Principal SEECS Major Engr Arshad Nazeer Teaching BSCS-8AB sections Engr Nasir Mahmood Assistant Professor Engr Asma Majeed Lab Engr SEECS Digital Embedded Systems Lab Incharge and staff Students of BEE-9AB Support and Cooperation

• (^) Combinational

Circuits

• (^) Analysis Procedure
• (^) Design Procedure
• (^) Binary Adder-

Subtractor

• (^) Decimal Adder
• (^) Binary Multiplier
  • (^) Magnitude Comparator
  • (^) Decoders
  • (^) Encoders
  • (^) Priority Encoder
  • (^) Multiplexers

Chapter 4: Contents

IMPORTANT NOTE:

Chapter 4 is the application of the contents of all previous three chapters. So from exam point of view also you must revise previous chapters to appear in next OHT.

• (^) Logic circuits for digital system may be combinational or sequential - (^) A combinational circuit consists of logic gates whose outputs are a f unction of the current inputs - (^) Sequential circuits » (^) contain storage elements in addition to logic gates » (^) the outputs are a function of the current inputs and the state of the memory (storage) elements » (^) The state of storage elements, in turn, is a function of previous inputs so outputs also depend on past inputs » (^) They have feedback connection

Chapter 4: Introduction

Analysis Procedure

• (^) The analysis of a combinational circuit requires that w e determine function that the circuit implements
• (^) The first step in analysis procedure is to make sure th at the given circuit is combinational and not sequentia l (No feedback path)
• (^) To obtain the output Boolean function from a logic dia gram we proceed as follows - (^) Label all gate outputs that are a function of input variables with arbit rary symbols. Determine the Boolean function for each gate output - (^) Label the gates that are a function of input variables and previously l abeled gates with other arbitrary symbols. Find the Boolean function of these gates - (^) Repeat the above process (step 2) until the outputs of the circuit are obtained - (^) By repeated substitution of previously defined functions, obtain the output Boolean functions in terms of input variables

Analysis Procedure-Example

Analysis Procedure-Example

• (^) To obtain F 1 as a function of A,B and C, from a series o f substitutions proceed as follows F 1 = T 3 +T 2 = F 2 'T 1 +ABC =(AB+AC+BC)'(A+B+C)+ABC =(A'+B')(A'+C')(B'+C')(A+B+C)+ABC =(A'+B'C')(AB'+AC'+BC'+B'C)+ABC =A'BC'+A'B'C+AB'C'+ABC
• These functions F 1 and F 2 implement circuit of a full-a dder. Where:
• (^) F 1 is the sum “S”
• F 2 is the carry “C”

Derivation of the Truth Table

• (^) The derivation of the truth table for the circuit is a stra ight forward process once the output Boolean functio ns are known
• (^) To obtain the truth table directly from the logic diagra m without going through the derivations of the Boolea n functions, we proceed as follows: - (^) Determine the number of input variables in the circuit. For n inputs, f orm the 2 n possible input combinations and list binary numbers from 0 to 2n^ – 1 in a table - (^) Label the outputs of selected gates with arbitrary symbols - (^) Obtain the truth table for the outputs of those gates that are a functi on of the input variables only - (^) Proceed to obtain the truth table for the outputs of those gates that a re function of previously defined values until the columns for all out puts are determined

Design Procedure

• (^) The design procedure of combinational circuit

s involves following steps

• (^) State the problem (Circuit specifications)
• (^) From the circuit specifications determine the inputs and outp uts
• (^) The input and output variables are assigned symbols
• (^) Derive the truth table that gives the relationship between inpu ts and outputs
• (^) Derive the simplified Boolean functions (simplify by algebraic manipulation or K-map method) for each output as a function of input variables
• (^) Draw the logic diagram and verify the correctness of the desi gn

Code conversion example

• (^) Different digital systems use different types of codes
• (^) It is sometimes necessary to use the output of one sy stem as the input to another
• (^) A conversion circuit must be inserted between the two systems if each uses different codes for the same info rmation
• (^) A code converter is a circuit that makes the two syste ms compatible even though each uses a different bina ry code
• (^) To convert from binary code A to binary code B, the in put lines (of combinational circuit) must supply the bit combination of elements as specified by code A and t he output lines must generate the corresponding bit c ombination of code B

Code conversion : Truth Table

Input Output BCD Excess-3 Code

A B C D w x y z

Code conversion : K-Maps

• (^) There are four outputs, each as a function of four inpu t variables.
• (^) There are four maps, each representing one of the out puts, to obtain simplified Boolean functions.
• (^) The 1 ’ s marked inside the squares are obtained from t he minterms that make the output equal to 1
• (^) The 1 ’ s are obtained from the truth table by going ove r the output columns one at a time.
• (^) The 6 don ’ t care minterms 10 through 15 are marked with an X

BCD to Excess-3 Code Converte

r

• (^) The simplified functions (7 AND & 3 OR Gates)
  • (^) z = D'
  • (^) y = CD +C'D ‘
  • (^) x = B'C + B'D+BC'D'
  • (^) w = A+BC+BD
• (^) A two-level logic diagram may be obtained directly fro m the above Boolean expressions but there are variou s other possibilities for logic diagram that implements this circuit
• (^) Another implementation (4 AND & 4 OR Gates)
  • (^) z = D' = D’
  • (^) y = CD +C'D' = CD + (C+D)'
  • (^) x = B'C + B'D+BC'D' = B'(C+D) +B(C+D)'
  • (^) w = A+BC+BD = A+B(C+D)

BCD to Excess-3 Code Converte

r

• (^) The purpose of this manipulation is to use common g ates for two or more outputs
• (^) This is implemented with three levels of gates
• (^) OR gate with output C+D is used to implement partiall y each of three outputs
• (^) Implementation with original sum of products require seven AND gates and three OR gates whereas after m anipulation we require four AND gates and four OR ga tes
• (^) In this way the logical circuit has been implemented in a economical way.