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CSC-105L – Digital Logic Design
Lab Instructors: Miss Nosheen
Semester: 2nd (Spring 2025)
Session: 2025
Date:18-03-2026
LAB-4 Analysis of Universal Gates ICs with Truth Tables and
Implementation of the Digital Circuits
Name
Reg. No.
Marks
M.Rehan Ashraf
2025-CS-1278
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CSC-105L – Digital Logic Design

Lab Instructors: Miss Nosheen

Semester: 2 nd^ (Spring 2025)

Session: 2025

Date:18- 03 - 2026

LAB- 4 Analysis of Universal Gates ICs with Truth Tables and

Implementation of the Digital Circuits

Name Reg. No. Marks

M.Rehan Ashraf 2025 - CS- 1278

4.1 Objectives

The objectives of this experiment are:

  • To analyze the performance of given universal gates ICs and draw their truth tables.
  • To implement NOT, AND, and OR gates using NAND gates only
  • To implement NOT, AND, and OR gates using NOR gates only • To implement digital circuits using universal gates only

4.2 Theory

A universal gate is a gate that can implement any Boolean function without needing to use any other gate type. The NAND and NOR gates are universal gates. In practice, this is advantageous since NAND and NOR gates are economical and easier to fabricate and are the basic gates used in all IC digital logic families. An AND gate is typically implemented as a NAND gate followed by an inverter, not vice versa. Likewise, an OR gate is typically implemented as a NOR gate followed by an inverter, not vice versa.

4.2.1 NAND Gate

The NAND (Not – AND) gate has an output that is normally at logic level “1” and only goes “LOW” to logic level “0” when ALL its inputs are at logic level “1”. The Logic NAND Gate is the reverse or “Complementary” form of the AND gate we have seen previously. The logic or Boolean expression given for a logic NAND gate is that for Logical Addition, which is the opposite to the AND gate, and which it performs on the complements of the inputs. The Boolean expression for a logic NAND gate is denoted by a single dot or full stop symbol, (.) with a line or Overline, ( ‾‾ ) over the expression to signify the NOT or logical negation of the NAND gate giving us the Boolean expression of: A.B = Q. Then we can define the operation of a 2-input digital logic NAND gate as being: “If both A and B are true, then Q is NOT true.” Logic NAND Gates are available using digital circuits to produce the desired logical function and are given a symbol whose shape is that of a standard AND gate with a circle, sometimes called an “inversion bubble” at its output to represent the NOT gate symbol with the logical operation of the NAND gate as shown in Figure 4.2. Figure 4.2 Symbol of 2-input NAND gate Figure 4.1 NAND gate implementation using AND and NOT gates.

Figure 4.5 NOR gate equivalent The logic or Boolean expression given for a logic NOR gate is that for Logical Multiplication which it performs on the complements of the inputs. The Boolean expression for a logic NOR gate is denoted by a plus sign, (+) with a line or Overline, (‾‾) over the expression to signify the NOT or logical negation of the NOR gate giving us the Boolean expression of: A+B = Q. Then we can define the operation of a 2-input digital logic NOR gate as being: “If both A and B are NOT true, then Q is true.” Logic NOR Gates are available using digital circuits to produce the desired logical function and are given a symbol whose shape is that of a standard OR gate with a circle, sometimes called an “Inversion bubble” at its output to represent the NOT gate symbol with the logical operation of the NOR gate as shown in Figure 4.6. Figure 4.6 Symbol of 2-input NOR gate As with the OR function, the NOR function can also have any number of individual inputs, and commercially available NOR Gate ICs are available in standard 2, 3, or 4 input types. If additional inputs are required, then the standard NOR gates can be cascaded together to provide more inputs for example. Figure 4.7 4-input NOR function The Boolean Expression for this 4-input NOR gate will therefore be: Q = A+B+C+D If the number of inputs required is an odd number of inputs any “unused” inputs can be held LOW by connecting them directly to ground using suitable “Pull-down” resistors. The Logic NOR Gate function is sometimes known as the Pierce Function and is denoted by a downwards arrow operator as shown, A↓B.

4.2.4 Universal NOR Gate

Like the NAND gate seen in the last section, the NOR gate can also be classed as a “Universal” type gate. NOR gates can be used to produce any other type of logic gate function just like the NAND gate and by connecting them in various combinations the three basic gate types of AND, OR, and NOT function can be formed using only NOR gates, for example. Figure 4.8 Logic gates using only NOR gates. As well as the three common types above, Exclusive-OR, Exclusive-NOR, and standard NOR gates can also be formed using just individual NOR gates.

4.3 Equipment

  • DC Power Source / Power Supply
  • Breadboard
  • Connecting Wires

4.4 Components

  • ICs (7400, 7402)
  • 330 Ω / 1 kΩ resistor ¼ watt Measured: 330 Ω
  • LEDs https://pdf1.alldatasheet.com/datasheet-pdf/view/51021/FAIRCHILD/74LS00.html https://pdf1.alldatasheet.com/datasheet-pdf/view/51020/FAIRCHILD/74LS02.html

4.5 ICs Pin Diagrams

Table 4.1 Observation table of 1st^ IC

Input 1 Input 2 Output

Pin Number Logic / State Pin Number Logic / State Pin Number Logic / State 1 0 2 0 3 1 1 0 2 1 3 1 1 1 2 0 3 1 1 1 2 1 3 0

  1. IC Number: 7402 (NOR Gate IC) Table 4.2 Observation table of 2nd^ IC

Input 1 Input 2 Output

Pin Number Logic / State Pin Number Logic / State Pin Number Logic / State 2 0 3 0 1 1 2 0 3 1 1 0 2 1 3 0 1 0 2 1 3 1 1 0 Table 4.3 Observation table of 4 inputs-based NAND gate implementation

Input A Input B Input C Input D Output

0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 1 1 0 1 1 1 1 0 0 0 1 1 0 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 0 0 0 Table 4.4 Observation table of 4 inputs based NOR gate implementation.

Input A Input B Input C Input D Output

0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0

Table 2.7 Result Summary Sr No IC Number Type of Gate 1 7400 NAND Gate 2 7402 NOR Gate

4.10 Analysis

  1. Which two connections are necessary for an IC to work?

Ans:

The two necessary connections are:

  • Vcc (Power Supply)
  • Ground (GND) Without these, the IC cannot operate.
  1. To design a NOT gate from a NAND gate, both the inputs of a NAND gate are fed with the same

input signal. Does this concept hold for constructing a NOT gate using a NOR gate as well? Ans:

Yes. If both inputs of a NOR gate are connected to the same input , it behaves as a NOT gate. Example: Input = A Output = (𝐴+𝐴)′^ =𝐴′ So NOR can also work as an inverter.

  1. Which two gates are known as universal gates and why?

Ans:

The two universal gates are:

▪ NAND Gate ▪

NOR Gate

They are called universal because any Boolean function or any logic gate (AND, OR, NOT,

XOR, etc.) can be implemented using only NAND or only NOR gates.

  1. When any of the inputs of the NOR gate are high, what is the output?

Ans:

The output will be LOW (0).

Because NOR = NOT OR.

  1. When any of the inputs of the NAND gate is low, what would be the output?

Ans:

The output will be HIGH (1).

Because NAND gives LOW only when all inputs are HIGH.

4.11 Conclusion

The experiment was successfully performed to study the operation of universal gates. The

truth tables of 7400 NAND gate IC and 7402 NOR gate IC were verified experimentally. It was

also observed that NAND and NOR gates can implement basic logic gates such as AND, OR, and

NOT, which proves that they are universal gates used in digital circuit design.

Assessment Rubrics CSE-105L – Digital Logic Design

Name: M.Rehan Ashraf Reg. No.: 2025 - CS- 1278

Method: Lab reports, viva, and instructor observation during lab sessions. Outcome Assessed:

  1. Ability to conduct experiments and projects, analyze and interpret the acquired data, and synthesize information to derive valid conclusions for digital logic circuits. (P2) (PLO – 04)
  2. Ability to students will be able to demonstrate the implementation of digital logic circuits using Verilog simulations through modern tools. (P2) (PLO – 05).
  3. Ability to contribute effectively and ethically as a team member towards the completion of labs and semester projects. (A2) (PLO – 09).
  4. Ability to report and explain their project, experimental results, and findings effectively in written as well as in oral communication. (C2) (PLO – 10). Performance Meets expectation (4-5) Lacking in expectation (3-2) Does not meet expectations (1-0) Marks
  5. Conducting Experiment [1] Focused attention on the experiment. Does proper calibration of equipment, careful examine equipment and build circuits through relevant components, and ensure smooth? Operation and process. Focus was lost on several occasions. Calibrates equipment examines equipment, builds circuits through relevant components, and operates the equipment with minor errors. Students were hostile about participating or unable to do so. Or unable to calibrate appropriate equipment and build circuits through relevant components, and equipment. Operation is substantially wrong.
  6. Data Collection and Analysis [1] Accurately conducts simple computations and statistical analysis using collected data; correlates experimental results to known theoretical values; accounts for measurement errors and parameters that affect experimental results. Conducts simple computations and statistical analysis using collected data with minor errors; reasonably correlates experimental results to known theoretical values; attempts to account for measurement errors. And parameters that affect experimental results. Unable to conduct simple statistical analysis on collected data; no attempt to correlate experimental results with known theoretical values; incapable of explaining measurement errors or parameters that affect the experimental results.