COUNTERS
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Counters in Digital Circuits: Types, Characteristics, and Applications, Lecture notes of Digital Logic Design and Programming
Counters, a very important topic of physics.
Typology: Lecture notes
2018/2019
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COUNTERS
Counters
- (^) Counters
- (^) Definition
- (^) Types
- (^) Characteristics
- (^) Asynchronous Counters
- 7490, 7492, 7493
- (^) Synchronous Counters
- (^) MSI Counters
- (^) Especially the 74LS
- (^) Counters in VHDL
- (^) Other Counter Types
Clock
Count
optional inputs
Counter
Sm
S1 S S
S
S
Counters
Characteristic Description
Modulus Length of sequence
Coding Count sequence
Direction Up or down
Resetable Reset to zero
Loadable Load a specific value
- (^) Counters differ by a number of basic
characteristics, including:
Counters
- (^) Applications include:
- (^) system clock
- (^) timer, delays
- (^) watches, clocks, alarms
- (^) counting events
- (^) memory addressing
- (^) frequency division
- (^) sequence control
- (^) cycle control
- (^) protocols
Present State Next State
A B A B
0 0 0 1
0 1 1 0
1 0 1 1
1 1 0 0
00 01
(^1110)
Counters
- (^) Ripple counters
- (^) asynchronous
- (^) an n-state counter that is formed from n cascaded
flip-flops
- (^) the clock input to each of the individual flip-flops,
with the exception of the first, is taken from the
output of the preceding one
- (^) the count thus ripples along the counter's length
due to the propagation delay associated with each
stage of counting
Asynchronous Ripple Counter
Q3 Q2 Q1 Q
Q
Q
Q
Q
Ripple Counter Timing
CLK
Q
0 1 2 3 4
1 ∆
2 ∆
3 ∆
Q
Q
- (^) But there is delay ( ∆ ) as shown below:
Asynchronous Ripple Counter
Q
Q
Q
Q
divide-by-
divide-by-
divide-by-
divide-by-
a T flip-flop is a a T flip-flop is a
natural frequency natural frequency
divider … divider …
Logic Diagram
The J and K inputs shown without
connection are for reference only and
are functionally at a HIGH level.
Reset/Count Function Table
H = HIGH Level
L = LOW Level
X = Don’t Care
LSB
MSB
Synchronous
counter
serial enable logic
4-Bit Counter
Synchronous
counter
LSB
MSB
parallel enable logic