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Digital Logic Fundamentals

CT101 – Computing Systems

Overview

• Gates, latches, memories and other logic

components are used to design computer systems

and their subsystems

• Good understanding of digital logic is necessary in

order to learn the fundamentals of computing

systems organization and architecture

• Two types of digital logic:

– Combinatorial logic: output is a function of inputs

– Sequential logic: output is a complex function of inputs,

previous inputs and previous outputs

• Neither combinatorial logic or sequential logic is

better than the other. In practice, both are used as

appropriate in circuit design.

AND

x

y

out

• Output is one if every input has

value of 1

• More than two values can be

“and-ed” together

• For example xyz = 1 only if

x=1, y=1 and z=

Y(t)

X(t)

out(t)= x(t) and y(t)

amplitude

x y out = xy

OR

x

y

out

x y out = x+y

• Output is 1 if at least one input

is 1.

• More than two values can be

“or-ed” together.

• For example x+y+z = 1 if at

least one of the three values is 1.

Y(t)

X(t)

out(t)= x(t) or y(t)

amplitude

NOT

• This function operates on a single

Boolean value.

• Its output is the complement of its

input.

• An input of 1 produces an output of 0

and an input of 0 produces an output of

1

x(t)

x'(t)

amplitude

(^0 )

(^1 )

1 1

1 0

x x'

x x'

0 1

1 0

NAND

• Output value is the

complemented output from an

“AND” function.

x y out = x NAND y

out(t)= x(t) NAND y(t)

Y(t)

X(t)

amplitude

0

1 1

0 1 0 1

(^0 )

1 1 1

x

y

out

XNOR

• Output value is the

complemented output from an

“XOR” function.

x y out =x xnor y

x

y

out

Y(t)

X(t)

out(t)= x(t) xnor y(t)

amplitude

Manipulating Boolean Functions

x y z xy' yz xy'+yz

0 0 0 0 0 0

0 0 1 0 0 0

0 1 0 0 0 0

0 1 1 0 1 1

1 0 0 1 0 1

1 0 1 1 0 1

1 1 0 0 0 0

1 1 1 0 1 1

• Consider a function that must be 1 if either x = 1 and

y = 0 or y = 1 and z = 1

• We express it as: f(x,y,z) = xy’+ yz

• The truth table is:

DeMorgan’s Law

(ab)’=a’+b’

(a+b)’=a’b’

• Property for generating equivalent functions

• Allows conversion of AND function to an

equivalent OR function and vice-versa

• It may allow the simplification of complex

functions, that will allow a simpler design

• It is useful in generating the complement of a

function

Generating the complement of a

function using DeMorgan’s law

(xy’ + yz)’ = (xy’)’(yz)’ = (x’ + y)(y’ + z’) = x’y’ + x’z’ +

yy’ + yz’ (because yy’=0) => (xy’+yz)’ = x’y’ + x’z’ + yz’

x y z x'y' x'z' yz' x'y‘ + y'z‘ + yz'

0 0 0 1 1 0 1

0 0 1 1 0 0 1

0 1 0 0 1 1 1

0 1 1 0 0 0 0

1 0 0 0 0 0 0

1 0 1 0 0 0 0

1 1 0 0 0 1 1

1 1 1 0 0 0 0

Gray Code

• Depends on the number of bits in its value

• The 1-bit Gray code serves as basis for the 2-bit Gray

code, the 2-bit Gray code is the basis for 3-bit Gray code,

etc…

• Gray code sequences are cycles: 000 -> 001 -> 011 -> 010

• Adjacent values differ by only one bit

K-map Example

• Let’s consider (xy’+yz)’ = x’y’ +

x’z’ + yz’

• Group together the 1s in the map:

• g1: x’y’z’+x’y’z=x’y’(z’+z)=x’y’
• g2: x’yz’+xyz’ = yz’(x’+x)=yz’
• g3: x’yz’+x’y’z’=x’z’(y+y’)=x’z’

• To derive a minimal expression we

must select the fewest groups that

cover all active minterms (1s).

• (xy’ + yz)’= x’y’ + yz’

x y z x'y'+y'z'+yz'

0 0 0 1

0 0 1 1

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 1

1 1 1 0

Buffers

• Regular buffer - The regular buffers always passes the

input to the output, its purpose being to boost the current

of the input to a higher level. When implemented in

circuitry, the Boolean values 0 and 1 have specific voltage

and current values; buffers maintain those values to ensure

that the system performs properly

• Of course, a buffer will introduce a delay (as any other

gate), known as propagation time through buffers. If they

are not used wisely, they can be a dangerous source of

hazard in digital logic circuits

in out^ in^ out

Buffers

• The tri-state buffer : it has a data input, just like regular buffers, but also has an

ENABLE input.

• If ENB=1 then the buffer is enabled and the input is passed directly to the output
• if ENB=0, the buffer is disabled. Regardless of the input (represented by a don’t care value X in the truth table), the output is a high impedance state, Z. The tri-state buffer can also have an inverted enable signal
• High Impedance State : I = V/R (Ohm Law) if R (impedance) -> very big than

the I (current) goes nearly to zero (I-> 0). For a constant voltage, the current

decreases as impedance increases. The high impedance state reduces the current

levels so low that the buffer appears in the circuit as not connected to anything.

This is the role of tri-state buffers: they can be disabled to essentially break

connections.

ENB

in out

ENB

in out

in ENB out

x 0 Z

0 1 0

1 1 1

in ENB out

x 1 Z

0 0 0

1 0 1