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Digital System Design
L A B M A N U A L
Course code: 15 EC 1101
For
I Semester / II Year
Of
B.Tech.
CSE, ECSE, ECE, EEE
KL UNIVERSITY
VADDESWARAM, GUNTUR – 522 502 (A.P.) INDIA
2017-18
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Digital System Design Practicals, Study Guides, Projects, Research of Electronics
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Digital System Design
L A B M A N U A L
Course code: 15 EC 1101
For
I Semester / II Year
Of
B.Tech.
CSE, ECSE, ECE, EEE
KL UNIVERSITY
VADDESWARAM, GUNTUR – 522 502 (A.P.) INDIA
DIGITAL SYSTEM DESIGN LAB 15EC
LIST OF Experiments
Exp.
No. Name^ Lab Type
1 LED Control Using Universal Gates IN Lab
2 Combinational Circuit Based Car Security System IN Lab
3 Participant^ selection^ in^ Competitions^ Using
Multiplexer
IN Lab
4 Digital Display of Department Name IN Lab
5 Random Number Generator for Gaming Using D-Flip-
flop
IN Lab
6 Design^ of^ Automobile^ garage^ control^ system^ using
counters
OPEN Lab
7 Digital Unlocking System using Shift Register OPEN Lab
8 Digital Data Storage Using Semiconductor Memories OPEN Lab
Components Required as per Experiment Number:
- IC’s 7400 & 7402
- IC’s 7408, 7432, 7404
- IC’s 74151, 74138, 7410
- IC’s 7447, 7490, FND 542
- IC’s 74190, 7474
- IC’s 7476, 7486
- IC’s 7421
- IC’s 7489 Other than these IC’s we require LED’s (Red, Green, and White) 100 each Bread boards or Digital Trainers (25) ---- To conduct experiments for 25 batches at a time Connecting wires
(All the basic concepts will be covered in class room with simulation tool logisim or multisim prior to lab application oriented experiments)
Course Team members and Chamber Venue details
S.No. Name of Faculty Chamber Consultation Room No: 1 Dr. B T P Madhav ALRC-R&D 2 Dr. V S V Prabhakar ECE-HOD 3 Dr. Habibulla Khan Dean SA Cabin 4 Dr. Fazal Noorbasha C 5 Dr. M Sridhar 6 Dr. Harikishore 7 Dr. Yogesh Mishra 8 Dr. Venkataratnam 9 Dr. P Pardhasaradhi 10 Dr. Sunitha Mani 11 V Subbareddy 12 G V Ganesh 13 Ch Sri Vardhan 14 K Anusha 15 D Pardhasaradhi 16 M Venkateswararo 17 T Narendra Babu 18 N Siddaiah 19 B Kalivaraprasad 20 M Manasa 21 P Srikanth Reddy 22 T Sanath Kumar 23 M Vasuja Devi 24 Siva Sankar Prasad 25 A Sateesh 26 V Narasimha Nayak 27 K Sripath Roy 28 Ch Raghava Prasad
LAB Projects List Sl.No Title of the Project 1 Design and implementation of a Totally Self-checking Circuit for Berger codes 2 Design and implementation of a Serial to parallel converter 3 Design and implementation of a 1 out of 8 detector. 4 Design and implementation of a Booth Algorithm 5 Design a car security system 6 Design and implementation of a Multiplier carry slave array 7 Design and Implement a vending Machine 8 Design and implementation of ALU 9 Design of Car Parking system 10 Transmit a given sequence through encoder and decode the same 11 Design and implement a 3 stage BILBO 12 Design and implementation a traffic light controller 13 LFSR for circuit fault testing and function verification (^14) SDR and DDR data transfer system 15 Design a module that measure the period of any periodic signal 16 Fault diagnosis of VLSI circuits using FPGA 17 Design and implementation of a an unsigned 8-bit greater or equal comparator (^18) Design and implementation of a 8-bit subtractor 19 Design and implementation of Random Counter 20 Design and implementation of a sequence detector 21 Design and implementation of XC4000 CLB 22 Diagnosis of Hazards in digital circuits using FPGA 23 Design and implementation of 3x3 binary multiplier with reduced number of gates 24 Design and synthesize a BCD to 7 Segment decoder circuit for driving a 7- Segment LED display 25 Design a dedicated data path for counting 0’s and 1’s 26 Design and implementation of 4-bit BCD adder 27 Home security sytem
NOTE: These projects are only for reference not fixed.... New concepts are accepted
… and encouraged.
Circuit Implementation Using NOR Gate
Theory: NAND and NOR gates are known as universal logic gates. We can implement any logic by using these universal logic gates. A logic circuit is designed to control LED’s using NAND and NOR logic gates.
Procedure:
a) Connections are made as per the circuit diagram I
b) By applying the inputs, the LED outputs are observed and the operation is verified with the help of truth table.
Precautions:
- Connections must be tight on the bread board.
- Identify the pins of the IC properly.
- Take care while removing and inserting the IC on bread board.
Result:
Understand the concept of universal gates
Identify the replacement of universal gates instead of basic gates
LED on and off controlling using universal gates
Experiment – 2
Combinational Circuit Based Car Security System
Aim: To Design a combinational circuit that check the following conditions to
start the car engine Otherwise blow horn if any one condition fails
Unlock the doors Whether the seat belt is fasten or not whether the doors are properly closed or not
Apparatus:
Logic Gates No of 3-input AND gates
No of 2-input AND gates
No of 2- input OR gates
No of Inverters
Principle of Operation:
It is used to provide the security and safety to the passengers travelling in the car. When a driver step into the car first it checks whether all the doors are properly closed or not if the doors are closed then it checks for seatbelt is fasten or not all the conditions are satisfied then the engine will start otherwise buzzer will blown.
Block diagram:
Experiment – 3:
Participant selection in Competitions Using Multiplexer
Aim : Participant selection in competitions.
Two judges of the Indian Idol competition need the help of digital logic to display whether the participant must stay or leave the competition without displaying their votes. The selection criteria are as follows.
- At least one judge should vote positively.
- Same type of votes cancel each other.
- If the participant stays, green LED should glow.
- If the participant leaves, red LED should glow. Components Required : LED’s (Green and Red), MUX IC, NI Multisim with MyDAQ
Theory :
- There will be 4 possibilities based on the voting of two judges (say A & B).
- If the 2 judges vote positively or negatively for the participant, then the participant should leave the competition i.e., if 00 or 11 then output should be zero.
- If both the judges vote compliment to each other, then the participant stays in the competition i.e., if 01 or 10 then output should be one.
- Since one of the combination will occur at a time based on the voting we can switch the output using a multiplexer.
- The circuit diagram is shown below for the given conditions. Circuit Diagram :
Truth Table :
A B Decision Mux Output LED Status 0 0 Leaves 0 RED ON 0 1 Stays 1 GREEN ON 1 0 Stays 1 GREEN ON 1 1 Leaves 0 RED ON
Procedure :
- Construct the multiplexer using the basic gates as shown in Fig 2
- Connect the componentson the bread board as per given circuit diagram (Fig 1).
- Give Power Supply and the inputs using MyDAQ
- Change the selection lines and observe the output for each combination. Observation:
- What happens if both the judges vote positively for the participant?
- Does both LEDs glow at the same time for any combination?
- Can we implement the digital logic for the given problem using universal gates other than MUX?
Figure 1.(A)Common cathode display (B)Common anode display
7-Segment Display Format
Figure 2: Seven Segment Display
Truth Table for a 7-segment display
Individual Segments Display a b c d e f g
× × × × × × 0
× × 1
Individual Segments Display A b c d e f g
× × × × × × × 8
× × × × × × 9
× × × × × 2
× × × × × 3
× × × × 4
× × × × × 5
× × × × × × 6
× × × 7
× × × × × × A
× × × × × b
× × × × C
× × × × × d
× × × × × E
× × × × F
Figure 3: 7-Segment Display Elements for all Numbers.
It can be seen that to display any single digit number from 0 to 9 in binary or letters from A to F in hexadecimal, we would require 7 separate segment connections plus one additional connection for the LED’s “common” connection .
Binary Coded Decimal
Binary Coded Decimal (BCD or “8421” BCD) numbers are made up using just 4 data bits (a nibble or half a byte) similar to the Hexadecimal numbers we saw in the binary tutorial, but unlike hexadecimal numbers that range in full
7 0 1 1 1 7 15 1 1 1 1 Invalid
BCD to 7-Segment Display Decoders
A binary coded decimal (BCD) to 7-segment display decoder such as the TTL 74LS47 or 74LS48, have 4 BCD inputs and 7 output lines, one for each LED segment. This allows a smaller 4-bit binary number (half a byte) to be used to display all the denary numbers from 0 to 9 and by adding two displays together; a full range of numbers from 00 to 99 can be displayed with just a single byte of 8 data bits.
BCD to 7-Segment Decoder
Procedure:
- Open NIMultisim,then choose My DAQ
- Create New File- Blank- NI My DAQ icon, then select design
- Create template, select only DIO inputs for connections
- Place component, Select segment display
- Make connections in the NI-Multisim
- Execute the circuit and verify with truth table.
Figure 3: Simulated image of the displaying “department name- ECE”
Result: Implemented department name on digital display using NI Multisim and verified using truth table. Learnt encode decimal numbers into 7 Segment display. Understand the interfacing techniques and data acquisition using NI Multisim.
PIN diagram
Procedure
- Connect the IC’s as illustrated in circuit diagram
- Reset the counter using parallel data input
- If the Car enters the garage set the SR-Latch on leading edge and Q` puts the counter in UP mode
- The same input of SR goes through NOR gate and clock triggers the counter
- When each car enters the garage, counter increments by 1 and counter reaches last stage (100) then MAX/MIN is high and LED glows
- When each car exit the garage, counter decrements by 1 and count reaches last stage (0), then MAX/MIN is low and LED stops.
Result
From this experiment students understands the operation of UP and DOWN counters.
It is also understandable to use counters in different digital applications like digital clock, parallel to serial data conversion and counter decoding.
Experiment – 6:
RANDOM NUMBER GENERATOR FOR GAMING USING D- FLIPFLOP
Aim: To generate random number for gaming ,usingD-flipflops.
Components Required: -
S.No Component Name Quantity 1 IC 7474 1 2 IC 7486 1 3 Breadboard 1 4 LEDs 4 5 Connecting Wires Required number
Theory: Circuit counts through 2 4 -1 different non-zero bit patterns. Left most bit determines shift or more complex operation Can build a similar circuit with any number of FFs, may need more xor gates. In general, with n flip-flops, 2 n-1 different non-zero bit patterns.
Circuit Diagram:
Q 4 Q^ D Q 3 Q^ D Q 2 Q^ D Q 1^ Q^ D
C L K
Block Diagram: