Learning FETs and Common Source Amplifiers: Goals, Operation, and Analysis, Slides of Electrical Circuit Analysis

Download Learning FETs and Common Source Amplifiers: Goals, Operation, and Analysis and more Slides Electrical Circuit Analysis in PDF only on Docsity!

FETs-

(Field Effect Transistors)

Learning Goals

• Understand the Basic Physics of MOSFET

Operation

• Describe the Regions of Operation of a

MOSFET

• Use the Graphical LOAD-LINE method to

analyze the operation of basic MOSFET

Amplifiers

• Determine the Bias-Point (Q-Point) for

MOSFET circuits

“Common” – What does it mean?

• “Common” is an electronics term that

usually means a digital -GROUND of Some

Sort.

• Recall that in the small Signal Case that

VDC Sources are effectively SHORTS to the

Small-Signal “Common”, or GND

Connection

• Example: A “common-source” MOSFET amp

has the source connected to small-signal GND

somehow

Refined Small Signal Model

• The KCL Equation for the model

that accounts for the

upward iD Slope in SAT

• The Graphical Representation

d

ds d m gs r

v i = g v +

−

v ds

Common Source Amplifier

• Analyze, Qualitatively

the CS Amp Circuit

• Recall for Caps
  • SHORTS to fast AC
  • OPENS to DC
    • C 1 and C 2 are

“Coupling” capacitors

• C 1 couples the input to the MOSFET gate
• C 2 couple the Output to the Load, R (^) L
• CS connects the FET

Source-Connection to

GND (or Common)

Common Source Amplifier

• Analyze, Qualitatively

the CS Amp Circuit

• Resistors R 1 , R 2 , R (^) D, and

RS form the Bias

Network

• The Bias Network is

designed to set the Q-

Point to allow a large

swing in the output

signal, vo, as a result of

large input Voltage (vin

= vgs) Changes.

• The FET MUST Remain in SATURATION during the entire Swing

Large-Small Signal Model

→ Short To AC Signals

CS-Amp Voltage Gain

• By Parallel Resistors
  • Use these equivalent

Resistances to simplify

the small signal Ckt

• Also define vin and vo for

12 the equivalent circuit

1 2 R R

RR

RG

RL rd RD R L

CS-Amp input Resistance

• Recall R = ∆V/∆I
• For the Common

Source Amp

• From

Before

• Thus R (^) in

v gs −

v o −

v in

i in io

G in

G in in

in in (^) i R

R i i

v R = = =

gm v gs

1 2

1 2 R R

R R

RG

1 2

1 2 R R

RR

Rin

CS Amp OutPut Resistance

• To find the OUTput

Resistance

• Set v(t) = 0
  • i.e.; it becomes at short
• Disonnect Load R (^) L
• Find R Looking into the R (^) L terminals
• This Produces the Ro

circuit

• Since vgs = 0 V, then g (^) mvgs

= 0 amps

• i.e.; the dependent current source is OPEN
• Thus can Find Ro by

Parallel combination

d D

d D o r R

r R R

=

Source Follower Circuit

• Notes on SF Ckt
  • R is the internal (thevenin) resistance of the input source
  • C 1 and C 2 are Coupling Capacitors - They are SHORTS to the Small Signal
  • R 1 , R 2 , and RS form the Bias (Q-Pt) Network

Source Follower Circuit

• Note that in this case the DRAIN is connected

to DC-Source VDD ; a SHORT to the Small Signal.

• Then the Small Signal Model

Source Follower Circuit

• Note that the
  • Source is at the vo Voltage
  • Gate is at the vin Voltage
• Then by KVL on

a clever Loop in gs o

o gs in v v v

v v v = +

− − + = 0 or

RG R L′

Source Follower Circuit

• But

recall

• Substitute out vo in the

previous Eqn

• Then the Voltage Gain

(amplification)

• With a bit of Algebra
• Cancelling v (^) gs Find in

the Small Signal Case:

vo =ioRL′ = gmvgsR L′

in gs m gs L

in gs o v v g v R

v v v = +^ ′

= + or

gs m gs L

m gs L in

o v (^) v g v R

g v R v

v A

• ′

gs(^ m L)

gs m L v (^) v g R

v g R A

• ′

m L

m L v g R

g R A

• ′

′

1

RG R L′