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Professor Miller, Manchester Metropolitan University, Electrical Engineering, Electrical Engineering Analysis Analogue Electronics, 1999 2000 Exam, push pull amplifier, efficiency, DC input power, transistor, emiiter, signal, amplifier, voltage gain, capacitor, AC voltage, phase shift, impedance, shunt impedance, relative permittivity.
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S414 02/09/
Exam ination for th e BEng (H O NS) ELECTR O NIC ENGINEER ING (PA R T-TIME) YEA R O NE
W ednesday 24 May 2000
2.00pm to 4.00pm
Instructions to Candidates
A ttem pt TW O questions from each section.
It is recom m ended th at you spend O NE H O UR O N EACH SECTIO N.
b ) Explain, w ith th e aid of a circuit diagram , h ow th e prob lem of crossover distortion can b e overcom e using a Class A B am plifier configuration. Is th e Class A B am plifier m ore or less efficient th an a Class B am plifier? Explain your answ er. [6]
c) State th e m axim um th eoreticalefficiency of a Class B am plifier and a Class A am plifier w ith a resistive load. [2]
d) For a particular Class B am plifier th e D C input pow er is 50 w atts and th e efficiency of th e am plifier is 60%. Th e m axim um junction tem perature of th e pow er transistors is 200 degrees Centigrade and θJC = 2 deg C/W. D e term ine th e m axim um th erm alresistance of a suitab le h eatsink , assum ing b oth output pow er transistors are m ounted on th e sam e h eatsink and th e m axim um am b ient tem perature is 30 degrees Centigrade. [8]
h FE(m in) = 200 h FE(m ax) = 400 VBE = 0.7 volts
Th e quiescent collector current sh ould b e approxim ately 1 m A.
Th e am plifier sh ould provide m axim um possib le undistorted collector voltage sw ing for a large signaloutput. A llresistors sh ould b e NPV (nearest preferred values) in th e E12 range. Sh ow allyour calculations and state any assum ptions you m ak e. [14]
b ) D e term ine th e approxim ate pow er dissipation of th e transistor in th e circuit. [4]
c) If, by m istak e, a collector load resistor of one-tenth th e value you originally calculated w as placed in th e circuit, h ow w ould th is affect th e collector voltage sw ing? [2]
b ) Th e idealoperationalam plifier in th e circuit of Figure 4 uses a + /- 15 volt pow er supply. D e term ine th e output voltage Vo and th e voltage VA at node A :
(i) w h en V 1 = 0 volts and V 2 = 1 volt; (ii) w h en V 1 = 1 volt and V 2 = 10 volts. [12]
Figure 4
100kΩ
10kΩ
A
50kΩ
VA 5kΩ
V 1 VO
V 2
(i) a series im pedance, Z ; (ii) a sh unt im pedance, Y; (iii) an Lnetw ork com prising a series im pedance, Z , follow ed by a sh unt im pedance, Y. [8]
b ) To determ ine th e A BCD param eters of a netw ork , open-circuit and sh ort- circuit tests are perform ed. Th e results are as follow s.
O pen-circuit test:
Input voltage: 10V, input current: 5A. O pen-circuit output voltage: 5-j5 V.
Sh ort-circuit test:
Input voltage: 10V, input current: 5-j5 A Sh ort-circuit output current: 5-j5 A.
D e term ine th e A BCD param eters of th e netw ork. [6]
c) H ence sh ow th at th e netw ork is passive, but not sym m etrical. [2]
d) Furth er sh ow th at th e netw ork com prises a series im pedance follow ed by a sh unt im pedance. [4]
b ) State th e form ula for th e reflection coefficient at a distance z from th e load in term s of ρ 0 , θ , βand z. [2]
c) Th e m axim um and m inim um voltages of th e standing w ave on an open- w ire, loss-free line w ith ch aracteristic im pedance of 50 Ω are 6.8 V and 4.3 V respectively. Th e tw o voltage m axim a nearest th e load term inating th e line occur at distances of 0.27 m and 2.45 m from th e load.
D e term ine:
(i) th e VSW R ; [2] (ii) th e w avelength of th e signal; [2] (iii) th e frequency of signal; [3] (iv) th e voltage reflection coefficient at th e load; [3] (v) load im pedance; [3] (vi) th e ph ase constant, β. [2]
