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Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science
6.002 – Electronic Circuits
Final Exam
Fall 1998
• This exam has five problems. They all carry equal weight.
• A set of five answer sheets is provided with this exam. Please put your
name on your answer sheets and on your exam book. Also, please circle
the name of your recitation instructor and the time of your recitation
on the cover page to the answer sheets.
• Do all of your work in your exam book, and then record your answers
on your answer sheets. Hand in both your exam book and your answer
sheets at the end of the exam period. You may keep the exam questions.
• You are welcome to use one double-sided page of notes while taking
this exam. Good luck!
• Final grades in 6.002 will not be given out by phone or by e-mail.
Rather, they should be available through WEBSIS by December 17.
You may review and/or take back your final exam at the beginning of
IAP in January 1999.
Problem 1
(A) Let A and B be logical variables that can take on the values of 0 or 1. Further, let C be a logic variable that is 1 if the numerical value of A is greater than or equal to the numerical value of B, and 0 otherwise. Write a truth table and a Boolean expression for C in terms of A and B.
(B) Consider the circuit module shown below comprising a pair of series connected n- channel MOSFETs and a resistor. The module has four terminals T1, T2, T3 and T4. Using one or more circuit modules, implement the Boolean function X = ¯A·B + ¯B ·A. The implementation must clearly show how the circuit modules are interconnected, how A and B, and the power supply are connected to the implementation, and at which terminal the output X appears.
In developing the implementation make the following four assumptions. First, assume that the ground potential is 0 V and that a 5-V power supply is available. Second, assume that a logical 1 is represented by the voltage of 5 V, and that a logical 0 is represented by the voltage of 0 V. Third, assume that A and B are both available in their true and complementary forms. Fourth, assume that the MOSFETs behave as ideal switches that turn on when a logical 1 is applied to the gate and turn off when a logical 0 is applied.
(C) Now, model the MOSFET using the switch-resistor model, and let the on-state re- sistance of each MOSFET be RON ≡ RnL/W. Assuming that all MOSFETs have the same size, derive a constraint for the value of L/W so that the circuit found in Part (B) provides a valid high output voltage given that the high output voltage threshold is specified by VOH = ˜VOH. In other words, the constraint must guarantee that the output voltage of the circuit will exceed ˜VOH when the output corresponds to a logical 1. Specify the constraint in terms of R, Rn, V˜OH, and the 5-V power supply voltage.
R
T 1
T 2
T 3
T 4
Circuit Module
GND
Problem 3
This problem examines the operation of the amplifier circuit shown below which is con- structed with a non-ideal op-amp. The op-amp is not ideal because it exhibits internal dynamics and finite gain. A model for the op-amp is also shown below.
(A) For the amplifier circuit, derive the differential equation that relates vOUT(t) to vIN(t).
(B) Let RICI → 0 and A → ∞ so that the op-amp becomes ideal. In this case, determine the ideal amplifier circuit gain G defined according to G ≡ vOUT(t)/vIN(t).
(C) Now consider the non-ideal op-amp, but with A G. Given that vIN(t) steps to VI at t = 0, determine vOUT(t) for t ≥ 0, in terms of A, G, RI, CI, and VI. Assume that vOUT(t) = vIN(t) = 0 before the step.
(D) Using the step response found in Part (C), determine the rise time T of the amplifier defined such that vOUT(T ) = (1 − e−^1 )vOUT(∞).
(E) Does the rise time T increase, decrease or remain unchanged if the ideal gain G is increased?
v (^) I
RI A v (^) I
C (^) I
v+
v (^) -
v+-v (^) -
R B
R A
v (^) OUT(t)
Non-Ideal Op-Amp
vIN(t)
Non-Ideal Op-Amp Model
Amplifier Circuit
Problem 4
In this problem, a low-voltage sinusoidal source is coupled to a resistive load through an inductor-capacitor network as shown below. The role of the network is to boost the voltage at the load.
(A) Derive the differential equation that relates vOUT(t) to vIN(t).
(B) Assume that the circuit operates in sinusoidal steady state with vIN(t) = VI cos(ωt). Let vOUT(t) take the form vOUT = VO cos(ωt + φ). Determine N ≡ VO/VI and φ.
(C) For a given L and ω, determine the value of C which maximizes N, and for this value of C, determine N.
(D) Suppose that vIN(t) is abruptly set to zero in an attempt to remove quickly the voltage at the load. In this case, the amplitude of the load voltage will decay in proportion to e−t/τ^. Assuming that C is chosen to maximize N following the result from Part (C), determine τ in terms of N and ω.
(E) In view of the results of Parts (C) and (D), what is the disadvantage of using an inductor-capacitor network to boost the voltage which excites the load?
v (^) IN (t) C v^ OUT (t)
L
R
Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science
6.002 – Electronic Circuits
Final Exam Answer Sheets
Fall 1998
Name:
Instructor: Umans Schmidt Stevens Gray Time: 9 10 10 11 11 12 2 3
6.002 Final Exam Name:
Problem 1
(A)
A B C
Truth Table
C =
(B) Implementation:
(C) Constraint:
6.002 Final Exam Name:
Problem 3
(A) Differential Equation:
(B) G =
(C) vOUT =
(D) T =
(E) Circle One: Increase Decrease Remains Unchanged
6.002 Final Exam Name:
Problem 4
(A) Differential Equation:
(B) N =
φ =
(C) C =
N =
(D) τ =
(E) Disadvantage:
