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CS 211: Computer ArchitectureCS 211: Computer Architecture
course wrapupcoursewrapup: goodbye to cs211!: goodbye to cs211!
Instructor: Prof. Bhagi Narahari
Dept. of Computer Science Course URL: www.seas.gwu.edu/~narahari/cs211/
CS 211: Computer Architecture, Bhagi Narahari
Recall from Course Intro... Perspective
- Computer architecture design is directly
linked to underlying technology
¾ Semiconductor ¾ Compiler technology ¾ Computational models
- Goal of software designers is to run an
application program efficiently on the
architecture
¾ Compiler plays a key role ¾ what is the interplay between architecture features and application program properties ¾ Bottom line is performance of application
CS 211: Computer Architecture, Bhagi Narahari
Trends In Technology, Applications,Architectures
CS 211: Computer Architecture, Bhagi Narahari
Emerging trends in Semiconductor Technology: Recall from Week 1!
- What’s the trend in Semiconductor
technology and its impact on new types
of processor architectures?
¾ some aspects to consider: ¾ Delay: switching time of transistor – impacts clock cycle ¾ Feature size: size of transistor – impacts amount of logic in processor ¾ Interconnect delay: clock cycle/delay in sending signal across the interconnect lines on a chip
CS 211: Computer Architecture, Bhagi Narahari
Available instruction-level parallelism
[Wall’93, DECWRL]
0
10
20
30
40
50
60
70
80
90
100
egreseddyaccecogrrmetalvicompdoduesprfpppgcc1hydrli mdljoraswmtomc
Application
ILP
Perfect Model Superb Model Good Model
CS 211: Computer Architecture, Bhagi Narahari
To summarize...
- Lots of hardware parallelism available ¾ can accommodate approx. 50 pentiums on one die in few years
However,
- Conventional architectures and compilation ¾ cannot expose enough parallelism in applications ¾ even the “superb” model yields an ILP < 10 on average
- Need for new architectures and compilation techniques!
CS 211: Computer Architecture, Bhagi Narahari
Emerging Architecture Directions
- ILP Architectures: This has been the focus of our discussions!
- ILP Wall leads to Multithreaded Processors ¾ Multi-Core Processors
- Reconfigurable Processors—better for special purpose applications ¾ let compiler handle everything ¾ no commitment to a particular architecture ¾ compiler generates architecture and code for it ¾ Example: FPGA based processors
CS 211: Computer Architecture, Bhagi Narahari
What “applications” have we considered?
- Focus has been on processor design for
general purpose computing
- Problems encountered during design of
processors for general purpose
computing
¾ Workstations, no power limitation, no size limitation…sometimes cost not an issue to begin with
CS 211: Computer Architecture, Bhagi Narahari
Microprocessor-based Systems
¾ Generalized to perform many functions
well.
¾ Operates on fixed data sizes.
¾ Inherently sequential.
Data Storage (Register File)
ALU
A B C
CS 211: Computer Architecture, Bhagi Narahari
Reconfigurable Computing
¾ Create specialized hardware for each
application.
¾ Functional units optimized to perform a
special task.
Functional Unit
A B
H L
If (A > B) { H = A; L = B; } Else { H = B; L = A; }
CS 211: Computer Architecture, Bhagi Narahari
Reconfigurable Hardware
¾ Each logic element operates on four one-bit inputs. ¾ Output is one data bit. ¾ Can perform any boolean function of four inputs
2 (2^4)^ = 64K functions!
Logic Element A B C D
Out
A B C D = out
CS 211: Computer Architecture, Bhagi Narahari
Field-Programmable Gate Array (FPGA)
¾ Each logic element outputs one data bit.
¾ Interconnect programmable between elements.
¾ Interconnect tracks grouped into channels.
LE LE
LE LE
LE LE LE LE
LE LE
LE LE
Logic Element Tracks
CS 211: Computer Architecture, Bhagi Narahari
Two Bit Adder
FA
A B
C (^) o C (^) i
S
Made of Full Adders A+B = D
Logic synthesis tool reduces circuit to SOP form
C (^) o = ABC (^) i + ABC (^) i + ABC (^) i + ABC (^) i
S = ABC (^) i + ABC (^) i + ABC (^) i + ABC (^) i
C^ LUT^ C^ o i
B
A
C^ LUT^ S
i
B
A
CS 211: Computer Architecture, Bhagi Narahari
FPGA Architecture Issues
¾ Need to explore architectural issues.
¾ How much functionality should go in a logic
element?
¾ How many routing tracks per channel?
¾ Switch “population”?
¾ Cost of reconfiguration
Logic Element
CS 211: Computer Architecture, Bhagi Narahari
Translating a Design to an FPGA
¾ CAD to translate circuit from text description to physical implementation well understood. ¾ CAD to translate from C program to circuit not well understood. ¾ Very difficult for application designers to successfully write high-performance applications
C program
C = A+B
Circuit
A B
+ C
Array
Need for design automation!
CS 211: Computer Architecture, Bhagi Narahari
High-level Compilers
¾ Difficult to estimate hardware resources. ¾ Some parts of program more appropriate for processor (hardware/software codesign). ¾ Compiler must parallelize computation across many resources. ¾ Engineers like to write in C rather than pushing little blocks around.
C = A+B
A B
C
for (i = 0; i<n, i++) { . . }
CS 211: Computer Architecture, Bhagi Narahari
A design methodology supporting the
cooperative and concurrent development of
hardware and software (co-specification, co-
development, and co-verification) in order to
achieve shared functionality and performance
goals for a combined system 1.
- Gupta, R. and De Micheli, G., “Hardware-Software Cosynthesis for Digital Systems,” IEEE Design & Test of Computers , September 1993, pp. 29-41.
+ economic goals
Definition – Hardware/Software Co-Design
CS 211: Computer Architecture, Bhagi Narahari
The target is to develop a methodology for
performing hardware and software development,
fabrication and support cost modeling concurrent
with hardware/software co-design.
•not possible to put everything into hardware due to resource limitations •Some things done better in hardware if we can get hardware configured to the application
Objective
CS 211: Computer Architecture, Bhagi Narahari
Partitioning Analysis
¾ Result of compilation is synthesizable HDL and assembly code for the processor
¾ Compiler profiler determines dependence and rough performance estimates
Embedded Systems
CS 211: Computer Architecture, Bhagi Narahari
Definition: Embedded System
- Embedded system: any device that
includes a programmable computer but is
not itself a general-purpose computer.
- Take advantage of application
characteristics to optimize the design:
¾ don’t need all the general-purpose bells and whistles. ¾ Constrained system resources ¾ Minimized human-machine interface (if at all) ¾ Singly-focused application that runs when power is applied and terminates when power source is turned off or depleted.
CS 211: Computer Architecture, Bhagi Narahari
Modern Embedded Systems
- Personal digital assistant (PDA).
- Consumer electronics (e.g. digital
cameras and household appliances)
- Cell phone
- Automobile engines, fuel control, etc.
- Global Positioning System (GPS) units
- Printers
- Home automation systems
- Manufacturing plants – process control
CS 211: Computer Architecture, Bhagi Narahari
Embedding a computer
CPU
mem
input
output (^) analog
analog
embedded computer
CS 211: Computer Architecture, Bhagi Narahari
Recognize This System?
CS 211: Computer Architecture, Bhagi Narahari
BMW 850i brake and stability control system
- Anti-lock brake system (ABS): pumps
brakes to reduce skidding.
- Automatic stability control (ASC+T):
controls engine to improve stability.
- ABS and ASC+T communicate. ¾ ABS was introduced first---needed to interface to existing ABS module.
- Action based on data collected in real-
time from sensors
¾ Note need to integrate sensors into your system!
CS 211: Computer Architecture, Bhagi Narahari
BMW 850i, cont’d.
brake
sensor
brake
sensor
brake
sensor
brake
sensor
ABS
hydraulic pump
CS 211: Computer Architecture, Bhagi Narahari
Characteristics of embedded systems
- Sophisticated functionality ¾ Often run complex algorithms; eg. cell phones
- Real-time operation. ¾ Hard real-time constraints = system fails if time deadlines are not met…(ABS)
- Low manufacturing cost – mass market
items
¾ Simple processors; small memory, microcontrollers, DSPs
- Low power. ¾ Battery powered devices; battery size
- Designed to tight deadlines by small teams.
CS 211: Computer Architecture, Bhagi Narahari
Challenges in embedded system design
- How much hardware do we need? ¾ How big is the CPU? Memory?
- How do we meet our deadlines? ¾ Faster hardware or smarter software?
- How do we minimize power? ¾ Turn off unnecessary logic? Reduce memory accesses?
CS 211: Computer Architecture, Bhagi Narahari
Program design and analysis for Embedded Systems
- Optimizing for execution time.
- Optimizing for energy/power.
- Optimizing for program size.
CS 211: Computer Architecture, Bhagi Narahari
Energy/power optimization
- Energy: ability to do work. ¾ Most important in battery-powered systems.
- Power: energy per unit time. ¾ Important even in wall-plug systems---power becomes heat.
CS 211: Computer Architecture, Bhagi Narahari
Power Equation
- P (^) AVG - the average power consumed by the
gates
- N (^) G - the number of gates that transition
- f (^) clk - the frequency of the system clock
- C (^) L - the average capacitive load per gate
- VDD - the supply voltage
2 2
1 PAVG = NGfclkCLV DD
CS 211: Computer Architecture, Bhagi Narahari
Considerations
- Which techniques are appropriate for incorporation into a compiler? ¾ Code Optimization ¾ Clock Gating ¾ Voltage Scaling ¾ Bit Correlation ¾ Memory power consumption
- What other benefits can be derived from these techniques? ¾ Heat and component reliability ¾ EMI noise reduction
CS 211: Computer Architecture, Bhagi Narahari
Data size minimization
- Reuse constants, variables, data buffers
in different parts of code.
¾ Requires careful verification of correctness.
- Generate data using instructions.
- May need to limit amount of optimization ¾ Example of loop unrolling
CS 211: Computer Architecture, Bhagi Narahari
Reducing code size
- Avoid function inlining.
- Choose CPU with compact instructions.
- Use specialized instructions where
possible.
CS 211: Computer Architecture, Bhagi Narahari
Adding logic to a board
- Programmable logic devices (PLDs)
provide low/medium density logic.
- Field-programmable gate arrays (FPGAs)
provide more logic and multi-level logic.
- Application-specific integrated circuits
(ASICs) are manufactured for a single
purpose.
CS 211: Computer Architecture, Bhagi Narahari
What is an SoC?
- A System on a Chip is a collection of
components that are designed as a
system and implemented in a fashion
similar to that of an Application Specific
Integrated Circuit (ASIC)
- The goal is to pack as much functionality
into a single die as possible
CS 211: Computer Architecture, Bhagi Narahari
Summary
- Embedded computers are all around us. ¾ Many systems have complex embedded hardware and software.
- Embedded systems pose many design
challenges: design time, deadlines,
power, etc.
- Relevance to Software designers? ¾ Trend is towards software development environments ¾ May no longer need sophisticated hardware designers to build embedded systems
- More on Embedded Systems – take
CS297 in Spring 2009
CS 211: Computer Architecture, Bhagi Narahari
Goodbye to CS 211
- Computer Architecture: key components and interplay between hardware and software
- Performance of application in terms of architecture features
- Improving performance via new classes of processors ¾ Instruction level parallelism (ILP) ¾ Superscalar and EPIC ¾ ILP Wall leads to Multi-Core Processors ¾ Multiprocessing on a chip
- Impact of memory organization on program performance
- Role of compiler
- Conclusions ?? ¾ Many parameters to choose from; application characteristics need to be taken into account
CS 211: Computer Architecture, Bhagi Narahari
Course Trivia…
- Project 2 due this week
- Exam 2 next Tuesday ¾ Focus on material after mid-term ¾ But need to remember enough from first part of the course ¾ Similar format to Exam 1 ¾ Multiple choice, short answers, and some detailed analysis
- Project 3 due December 9th ¾ One set of experiments per team ¾ Each team member writes their own report ¾ Yes, you can reach different conclusions with the same data!
