Finite State Machine Representation of Vending Machine and Traffic Light Controller, Papers of Astronomy

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Example: vending machineReset NVendingOpenCoinReleaseMachineSensor^ MechanismFSMD Clock

• Release item after 15 cents are deposited• Single coin slot for dimes (10¢), nickels (5¢)• No change

Example: vending machine (cont’d)• Suitable abstract representation– tabulate typical input sequences:•^ 3 nickels (3 X 5¢ =15¢)•^ nickel, dime (5¢ + 10¢ = 15¢)•^ dime, nickel (10¢ + 5¢ = 15¢)•^ two dimes (2 X 10¢ =20¢)– draw state diagram:•^ inputs: N, D, reset•^ output: open chute– assumptions:•^ assume N and D assertedfor one cycle• each state has a self loopfor N = D = 0 (no coin)

ResetN’ D’ S0 DN S2S1 DDNN S6S4S5S3[open][open][open]N S7[open]

• Example: vending machine (cont’d)• Uniquely encode statespresent state inputs next state outputQ1 Q0 D N D1 D0 open^0 0 0 0 0 0 00 1 0 1 01 0 1 0 01 1 – – – 0¢ 000 1 0 0 0 1 0 5¢ 010 1 1 0 0 10¢ 101 0 1 1 0 15¢ 111 1 – – –^1 0 0 0 1 0 00 1 1 1 01 0 1 1 01 1 – – – D0Q0^1 1 – –^1 1 1 Q D QQ1Q1D1D0D1Q1^0 0 1 10 1 1 0 QD^0 1 1 11 0 1 1 NNQX X X XX X X XDD^1 1 1 10 1 1 1 Q0Q
  • Q1Open 0 0 1 0 0 0 1 0 NX X X XD 0 0 1 0 Q
    • D1 = Q1 + D + Q0 ND0 = Q0’ N + Q0 N’ + Q1 N + Q1 DOPEN = Q1 Q
• Example: vending machine (cont’d)• Mapping to logicQ1D1^0 0 1 10 1 1 1 NX X X XD^1 1 1 1 Q
  • Q1Q1D0Open 0 1 1 00 0 1 0 1 0 1 10 0 1 0 NNX X X XX X X XDD 0 1 1 10 0 1 0 Q0Q

farm roadcar sensorshighway

Example: traffic light controller (cont’)• Highway/farm road intersection

Example: traffic light controller (cont’)• Tabulation of inputs and outputsinputs^ description^ outputs

description reset^ place FSM in initial state^ H(Green,Yellow, Red)

assert green/yellow/red highway lights C^ detect vehicle on the farm road^ F(Green, Yellow,Red)

assert green/yellow/red Farmroad lights TS^ short time interval expired^ ST^

start timing a short or long interval TL^ long time interval expired • Tabulation of unique states – some light configurations imply othersstate^ descriptionS0^ highway green (farm road red)S1^ highway yellow (farm road red)S2^ farm road green (highway red)S3^ farm road yellow (highway red)

Inputs^ Present State^ Next State^ Outputs C^ TL^ TS^

ST^ H^ F

0 –^ –^ HG^

HG^0 Green^ Red

-^0 –^ HG^

HG^0 Green^ Red 1 1 –^ HG^

HY^1 Green^ Red

-^ –^0 HY^

HY^0 Yellow^ Red

-^ –^1 HY^

FG^1 Yellow^ Red 1 0 –^ FG^

FG^0 Red^ Green 0 –^ –^ FG^

FY^1 Red^ Green

-^1 –^ FG^

FY^1 Red^ Green

-^ –^0 FY^

FY^0 Red^ Yellow

-^ –^1 FY^

HG^1 Red^ Yellow SA1:^ HG = 00^ HY = 01^

FG = 11^ FY = 10

SA2:^ HG = 00^ HY = 10^

Example: traffic light controller (cont’)output encoding – similar problemto state assignment(Green = 00, Yellow = 01, Red = 10) FG = 01^ FY = 11

•^ Generate state table with symbolic states•^ Consider state assignments

Inputs^ Present State^ Next State^ Outputs C^ TL^ TS^

ST^ H^ F

0 –^ –^ HG^

HG^0 Green^ Red

-^0 –^ HG^

HG^0 Green^ Red 1 1 –^ HG^

HY^1 Green^ Red

-^ –^0 HY^

HY^0 Yellow^ Red

-^ –^1 HY^

FG^1 Yellow^ Red 1 0 –^ FG^

FG^0 Red^ Green 0 –^ –^ FG^

FY^1 Red^ Green

-^1 –^ FG^

FY^1 Red^ Green

-^ –^0 FY^

FY^0 Red^ Yellow

-^ –^1 FY^ SA1:^ HG = 00, HY = 01, FG = 11, FY = 10^ (Green = 00, Yellow = 01, Red = 10)HG^1 Red^ Yellow

Example: traffic light controller (cont’) Inputs^ Present State^ Next State

Outputs C^ TL^ TS^ PQ1^ PQ^

NQ1^ NQ0^ ST^ H1^ H^

F1^ F

5 2 =32 states 4 4 2 4 4 2 4 4 4 4

Logic for different state assignments• SA1:^ HG = 00^ HY = 01^ FG = 11^ FY = 10NQ1 = C•TL'•PQ1•PQ0 + TS•PQ1'•PQ0 + TS•PQ1•PQ0' + C'•PQ1•PQ0 + TL•PQ1•PQ0NQ0 = C•TL•PQ1'•PQ0' + C•TL'•PQ1•PQ0 + PQ1'•PQ0ST = C•TL•PQ1'•PQ0' + TS•PQ1'•PQ0 + TS•PQ1•PQ0' + C'•PQ1•PQ0 + TL•PQ1•PQ0H1 = PQ^

H0 = PQ1'•PQ

F1 = PQ1'^

F0 = PQ1•PQ0'

•^ SA2:^ HG = 00^ HY = 10^ FG = 01^

FY = 11NQ1 = C•TL•PQ1' + TS'•PQ1 + C'•PQ1'•PQ0NQ0 = TS•PQ1•PQ0' + PQ1'•PQ0 + TS'•PQ1•PQ0ST = C•TL•PQ1' + C'•PQ1'•PQ0 + TS•PQ1H1 = PQ0 H0 = PQ1•PQ0'F1 = PQ0' F0 = PQ1•PQ

Q1Q

NQ0PQ0Q^ D^ Q NQ1PQ1QD^ Q

Sequential logic implementation summary• Models for representing sequential circuits–^ abstraction of sequential elements–^ finite state machines and their state diagrams–^ inputs/outputs–^ Mealy, Moore, and synchronous Mealy machines• Finite state machine design procedure–^ deriving state diagram–^ deriving state transition table–^ determining next state and output functions–^ implementing combinational logic• Implementation of sequential logic–^ state minimization–^ state assignment–^ support in programmable logic devices