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CORK INSTITUTE OF TECHNOLOGY
INSTITIÚID TEICNEOLAÍOCHTA CHORCAÍ
Semester 1 Examinations 2011
Module Title: Embedded Software Codesign
Module Code: ELTR
School: Electrical and Electronic Engineering
Programme Title: Master of Engineering in Embedded Systems
Programme Code: EMBED_9_Y
External Examiner(s):Dr. D. Heffernan, Mr. M. Kelleher, Mr. D. O Connell
Internal Examiner(s): Donal O’Donovan
Instructions: Answer ANY 2 questions.
Duration: 2 hours
Sitting: Winter 2011
Requirements for this examination:
Note to Candidates: Please check the Programme Title and the Module Title to ensure that you have
received the correct examination paper.
If in doubt please contact an Invigilator.
- (a) i. Briefly contrast (a) execution-indexed, (b) state-indexed and (c) hybrid
machine approaches to state machine implementation. Give practical examples of where each would be applied. [7 %]
ii. Write sample code to illustrate how two of the state machine approaches in (a) i. above may be implemented in practice. [10 %]
(b) The function prototype in Figure 1.1 may be used as a basis for supplying information to an implementation of the Quicksort algorithm:
void qsort(void* field, size_t nElements, size_t sizeOfAnElement, int(_USERENTRY *cmpFunc)(const void , const void));
Figure 1.
i. Discuss the widespread use of the ‘void ’ construct in arguments 1 and 4. [3 %] ii. Why are arguments 2 and 3 necessary? [2 %] iii. What C construct does the ‘int(…cmpFunc)(…)’ represent and subsequently explain the remaining syntax within the final argument. [3 %] iv. What advantage is gained by implementing the qsort function in this format? [2 %]
(c) Discuss the role of interrupt service routine (ISR) in RTOS programming. Your discussion should address the following: i. The attributes of well-written ISRs. [4 %] ii. Describe how interrupts are handled in the Linux and Windows CE OSs. Your discussion should make reference to the requirement of probing IRQs and Top and bottom halves. Use the Linux code in Figure 1.2 as a basis for your discussions. [10 %]
(Continued Over)
; Code for vCountErrors ; Italicised lines represent assembly equivalent of the ; preceding C code. void vCountErrors(int cNewErrors) { cErrors += cNewErrors; ; MOVE R1, (cErrors) ; ADD R1, (cNewErrors) // SWITCH 1 ; MOVE (cErrors), R1 // SWITCH 2 RETURN // SWITCH 3 ;} Figure 2.
ii. Demonstrate 3 ways of making the code in Figure 2.2 re-entrant and discuss the advantages and disadvantages in each case. [12 %]
Figure 2.
(b) A microwave application possesses the following tasks (period, execution
time), where all values quoted are in milliseconds: ‘Cooking’ task (10, 4) ‘Displaying’ task (15, 4) ‘Door’ task (6, 1) For the three periodic tasks above, design a static schedule.
i. Select an appropriate frame size. [10 %]
ii. Determine an appropriate static scheduler for the corresponding hyper- period in (b) i. [6 %]
Low Priority Task … while (1) { int x = 1 ; int y = 2 ; swap (&x, &y) ; } … int Temp;
void swap(int *x, int *y) { Temp = *x; *x = *y; *y = Temp; }
High Priority Task … while (1) { int w = 1 ; int z = 2 ; swap (&w, &z) ; } … int Temp;
void swap(int *x, int *y) { Temp = *x; *x = *y; *y = Temp; }
iii. Describe how slack stealing may be used to deal with the responsiveness of a cyclic, clock-driven scheduler? Briefly, mention the advantages and disadvantages of this approach. [6 %]
(c) Describe how TWO of the following concepts are used for inter-task communications in the uCOS-II RTOS and Linux.
i. Semaphore ii. Pipe iii. Mailbox [10 %]
- (a) Describe the time demand analysis technique used to test the feasibility of a fixed-priority schedule. [10 %]
(b) Illustrate the operation of the schedule feasibility test in 3(a) using: T 1 = (4, 2), T 2 = (6, 2) and T 3 = (12, 3). [6 %]
(c) Draw a table showing the outcome of Figure 3.1 for a priority-driven, pre- emptive scheduler for a two processor system. [12 %]
J 0 2/4 J 1 0/
J 2 1/
J 3 0/2^4
J 1/2 J 5 1/
J 6 1/2^7
J 0/
Release Time
Execution Time
Figure 3.
(d) The timing diagram in Figure 3.2 shows a task that delays itself for one clock tick. The shaded areas indicate the execution time for each operation being performed.
