













































Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Pipeline hazards, forwarding, and stalls in the context of systems architecture ii. It covers topics such as data hazards, control hazards, and exceptions, as well as techniques for handling them like dynamic branch prediction and delayed branches. The document also includes timing diagrams and examples to illustrate the concepts.
Typology: Study notes
1 / 53
This page cannot be seen from the preview
Don't miss anything!














































Systems Architecture I
Topics
Dealing with Pipeline Hazards
**Exploiting Memory Hierarchy: Cache Memory****
*This lecture was derived from material in the text (Chapter 6). **This lecture was derived from material in the text (Chapter 7).
Data Hazards and Forwarding
Problem: Instruction depends on the result of a previousinstruction still in the pipeline
Example
sub $2, $1, $
and $12, $2, $
or
$13, $6, $
add $14, $2, $
sw
$15, 100($2)
Timing Diagram with Data
Dependencies
Forwarding
Pipelined Datapath with Forwarding
Registers
Mux
Mux
ALU
ID/EX
MEM/WB
Data memory
Mux
Forwarding
unit
EX/MEM
b. With forwarding
ForwardB
Rd
EX/MEM.RegisterRdMEM/WB.RegisterRd
RsRtRt
ForwardA
Mux
ALU
ID/EX
MEM/WB
Data memory
EX/MEM
a. No forwarding
Registers
Mux
Datapath with Control for Forwarding
Instruction
memory
Registers
Mux
Mux
Control
Data memory
Mux
Forwarding
unit
Instruction
Mux
Rd
EX/MEM.RegisterRdMEM/WB.RegisterRd
RsRtRt
IF/ID.RegisterRsIF/ID.RegisterRtIF/ID.RegisterRtIF/ID.RegisterRd
Example 1
Instruction
memory
Registers
Mux Mux
Mux
Data memory
Mux
Forwarding
unit
Instruction
Control
Example 3
Instruction
memory
Registers
Mux Mux
Mux
Data memory
Mux
Forwarding
unit
Instruction
Control
Example 4
Instruction
memory
Mux Mux
Mux
Data memory
Mux
Forwarding
unit
Registers
Instruction
Control
Inserting Stalls into the Pipeline
If (ID/EX.MemRead and
((ID/EX.RegisterRt = IF/ID.RegisterRs) or
(ID/EX.RegisterRt = IF/ID.RegisterRt)))
stall the pipeline (insert nop by setting control = 0)
bubble
Datapath with Control for Stalls
Instruction
memory
Registers
Mux Mux
Mux
Control
Data memory
Mux
Hazard detection
unit
Forwarding
unit
Mux
Instruction
ID/EX.MemRead
IF/IDWrite
iter PCW
IF/ID.RegisterRsIF/ID.RegisterRtIF/ID.RegisterRt IF/ID.RegisterRdID/EX.RegisterRt
Rt Rd RsRt
EX/MEM.RegisterRdMEM/WB.RegisterRd
Example 2
Hazard detection
unit
Mux
IF/IDWrite
PCWrite
ID/EX.RegisterRt
Instruction
memory
Registers
Mux Mux
Mux
Data memory
Mux
Forwarding
unit
Instruction
Control
ID/EX.MemRead
Example 3