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EXPERIMENT NO : 10
FLASH ADC (2 BIT)
AIM:
To design and setup a 2 bit flash type ADC. COMPONENTS REQUIRED: SL NO
COMPONENTS SPECIFICATION QUANTITY
1 Op-Amp IC 741 IC As required 2 Resistor 10 kW 4 3 Regulated power supply
+/- 15 V 1
4 Trainer kit 1 5 CRO 30 MHz 1 THEORY: Also called the parallel A/D converter, this circuit is the simplest to understand. It is formed of a series of comparators, each one comparing the input signal to a unique reference voltage. The comparator outputs connect to the inputs of a priority encoder circuit, which then produces a binary output. The following illustration shows a 3-bit flash ADC circuit:
Vref is a stable reference voltage provided by a precision voltage regulator as part of the converter circuit, not shown in the schematic. As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state. The priority encoder generates a binary number based on the highest-order active input, ignoring all other active inputs. If the analog signal exceeds the reference signal to any comparator, that comparator turns on. If all comparators are off, analog input will be between 0 and +V/4. If C1 is high and C2 and C3 are low, input will be between +V/4 and +V/2.If C1 andC2 are high and C3 is low input will be between +V/2 and +3V/4. If all comparators are high , analog input will be between +3V/4 and +V. the outputs of three comparators are then fed to a coding network to provide 2 bits which are equivalent to the input analog voltage. CIRCUIT DIAGRAM:
