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Cork Institute of Technology
Bachelor of Science in Software Development and Computer Networking – Stage 1 Bachelor of Science (Honours) in Software Development – Stage 1 (NFQ Level 8)
Summer 2007
Computer Architecture
(Time: 3 Hours)
Answer any FIVE questions. Examiners: Mr. Séamus Lankford Mr. J. Buckley Dr. A. Kinsella Dr. M. O’Cinneide Mr. M. Donnelly
Q
(a) Convert the Binary number 1110 2 into its corresponding GRAY code. [2 marks]
(b) i) Convert the following from Hexadecimal to Binary ABBA 16 [2marks] ii) Convert the following from Hexadecimal to Octal FACE 16 [2 marks]
(c) Perform the following arithmetic, using 8 bits and using two’s complement representation: 35 - 22 [4 marks]
(d) Determine the Hamming code for the information bits, 10111 2 , using ODD parity. [5 marks]
(e) Assume the following 32-bit floating-point representation:
sign bit of mantissa
8 bit exponent in two’s complement
23 bit mantissa
Using this format, code the following value in floating point format: -23.0625 [5 marks]
Q2.
(a) Using a Sum of Products approach, design the circuit for the following truth table. In your design, show the Boolean expression for the truth table and the corresponding circuit.
A B C F (Output) 0 0 0 1 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 [6 marks]
(b) Draw the truth tables and circuits for the following: i) 2-to-4 line binary decoder ii) 4 input multiplexer [6 marks]
(c) Draw the truth table, K-map and circuit for the “c” segment of a 7-segment display decoder:
[8 marks]
Q
(a) Briefly describe the following addressing modes used in the 68000 microprocessor, giving a code example of each mode. Use simple diagrams where appropriate.
i) Immediate addressing ii) Direct data register addressing iii) Indirect address register addressing iv) Indirect address register addressing with post-incrementing v) Indirect address register addressing with pre-decrementing [10 marks]
(b) Write an assembly language program to find the maximum value stored in the following array. The maximum value should be copied to data register, D0. The array is terminated with the value 01. Include code, which checks if the end of the array has been reached.
INPUT: DC.B 08,07,43,05,01 [10 marks]
Q (a) Describe, with the aid of a diagram, the architecture of a 68000-based microcomputer system (Von Neumann architecture). Show the internal registers and components of a CPU, the system bus and the organisation of memory and Input/Output peripheral devices. [8 marks] (b) Write a 68000 assembly language program, which calculates the average of 6 numbers stored in the array, MYNUMS. The result, i.e. the average of the numbers, should be stored in register D0. Use some form of indirect addressing to access the elements within the array.
MYNUMS: DC.B 08,07,43,05,02,01 [5 marks]
(c) Write an assembly language program that counts then number of occurrences of the value 5 in the following array. Store your answer in D7.
INPUT: DC.B 4,6,5,5,6,5,2,7,5,3,0 [7 marks]
Q
(a) Briefly describe the characteristics of each of the following types of RAM:
i) FPM DRAM ii) SDRAM iii) RDRAM iv) DDR SDRAM [8 marks]
(b) What is the front side bus speed and theoretical transfer rate of the following DDR SDRAM? Show how you arrived at the transfer rates.
PC2-6400: DDR2-SDRAM [4 marks]
(c) Explain and illustrate what the “Hierarchy of Memory” means. In your explanation, give a rough indication of typical access speeds, required to access the various types of memory in the hierarchy. [8 marks]
Appendix 1
Transition Table for a JK Flip Flop:
Transition J K 0 -> 0 0 d 0 -> 1 1 d 1 -> 0 d 1 1 -> 1 d 0
Appendix 2
Frequently used Branch instructions:
Branch Condition Flag Setting BEQ EQUAL Z= BNE NOT EQUAL Z= BGT GREATER Z+(N XOR V) = BLT LESS N XOR V = BGE GREATER OR EQUAL N XOR V = BLE LESS OR EQUAL Z +(N XORV) =
