9S12 Assembly Program: Port T Bit Toggling Homework - Prof. Janos L. Grantner, Assignments of Microcomputers

Instructions for a homework assignment in ece 4510/5530 microcontroller applications course, fall 2008. Students are required to write a syntactically correct 9s12 assembly program that toggles bits 2 and 5 of port t (pt2 and pt5) at approximately 200ms intervals. The program should run in an infinite cycle, and the 200ms timing should be implemented as a 'software delay'. Instructions on how to calculate the inner delay of 50 microseconds and the total delay of 200ms, as well as suggestions for code, data, and variable locations.

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ECE 4510/5530 Microcontroller Applications
Fall 2008
Homework Assignment #2
Total: 60pts.
Due 3:30pm, Monday, September 22, 2008
Write a syntactically correct 9S12 assembly program that will toggle Bits 2and 5of
Port T (PT2 and PT5)at approx. 200ms intervals such that PT2 and PT5 will be each
other’s complement. The program should run in an infinite cycle. The addresses to
access to PORTT and DDRT, respectively, are posted in the Labs Section of the Class
Web Page. The 200ms timing should be implemented as a "software delay", i.e., the
time needed for the program to leave a loop after its entry on top should be
approximately 200ms. The number of clock cycles for fetching and executing
instructions are published in the CPU12 Reference Manual (Tables A-1,andA-2), and
one clock cycle takes 125ns. The core of the delay loop should take approx. 50
microseconds. In order to prove that your program would do the job, you should show
your calculations (i.e., develop a formula for your approach) to achieve the inner delay
of 50 microseconds, and the total delay of 200ms. Choose the code, data, and variable
locations for your program such that it could run on the system in the Lab but you are not
required to prove that it has actually run. Turn in your assembled .lst file and comment
on your code for full credit. (60 pts)

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ECE 4510/5530 Microcontroller Applications

Fall 2008 Homework Assignment # Total: 60pts. Due 3:30pm, Monday, September 22, 2008

Write a syntactically correct 9S12 assembly program that will toggle Bits 2and 5of Port T (PT2 and PT5 ) at approx. 200ms intervals such that PT2 and PT5 will be each other’s complement. The program should run in an infinite cycle. The addresses to access to PORTT and DDRT , respectively, are posted in the Labs Section of the Class Web Page. The 200ms timing should be implemented as a "software delay" , i.e., the time needed for the program to leave a loop after its entry on top should be approximately 200ms. The number of clock cycles for fetching and executing instructions are published in the CPU12 Reference Manual ( Tables A-1 , and A-2 ), and one clock cycle takes 125ns. The core of the delay loop should take approx. 50 microseconds. In order to prove that your program would do the job, you should show your calculations (i.e., develop a formula for your approach) to achieve the inner delay of 50 microseconds, and the total delay of 200ms. Choose the code, data, and variable locations for your program such that it could run on the system in the Lab but you are not required to prove that it has actually run. Turn in your assembled .lst file and comment on your code for full credit. (60 pts)