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CS 333: Lab 4
SRC Microprogrammed Control Unit
The control unit controls the operation of the datapath. In this lab, you will implement a horizontally microprogrammed control unit for your SRC datapath (Lab 3) in SMOK using a PLA (programmable logic array). This will complete the 2-cycle SRC implementation you’ve been building. Your design will now be able to execute programs written with the subset of the SRC instruction set discussed in class.
NOTES:
- You may work in pairs for this lab.
- This lab is in 3 parts: prelab, inlab, postlab. You will have difficulty completing the inlab portion in time if you do not complete the prelab BEFORE lab. Complete it beforehand. You will spend most of lab debugging your PLA implementation. Go to TA lab/office hours during the week of October 30 to get TA assistance if you need help understanding how to program the PLA or how to do any part of the lab.
- We will provide a working, correct, Lab 3 SMOK datapath solution for you to use (if you wish) on the class website. You may use your own Lab 3 datapath if you wish, but in this case it is your responsibility to test and debug your datapath. The TAs will NOT help you debug your datapath in this lab. They will only help you debug your PLA implementations. o Difference in our lab 3 solution from yours. The Lab 3 solution that we provide does not have an IsABranch control signal. Instead logic is used to decode the opcode from the IR to determine whether an instruction is a branch (8 or 9) or not.
- Initial program counter value. You MUST initialize the program counter to 0x1000. The test program we provide begins at memory address 0x1000. Therefore, you must initialize the PC to 0x1000.
Lab Objectives/Directions:
In this lab you will:
- Build a PLA (programmable logic array) implementation of a microprogrammed control unit for the SRC datapath you created in Lab 3. You will use the instruction control sequence handout that you completed in class. a. Program the PLA. The online documentation for a PLA describes the format for the file which describes the functioning of the PLA. (sample file available on the website): http://www.cs.washington.edu/homes/zahorjan/homepage/Tools/SMOK/Component Ref/pla.shtml. i. PLA Inputs. For the microprogrammed control unit you will be implementing with a PLA, you will need the following inputs : 1. Op code. The operation code field from the IR. 2. Clock signal from a register designated as the clock. You will have to add this. b. Add a stop instruction. You will need to add one more instruction (stop, which halts program execution). This should be done by adding the stop instruction to the PLA description. No additional datapath logic is required. i. Stop should have an opcode of 31 (decimal) and should set the following control signals (the rest are don’t cares) 1. PCWrite = 0 2. RegWrite = 0 3. MemWrite = 0 4. IRWrite = 0 5. Clock = 10 (binary)
- Connect the control unit to the datapath.
- Test the microprogrammed control unit to see that it correctly executes the SRC instructions by running a program saved in the memory unit. We will give you this program.
Lab 4 Checkoff Sheet Name:________________________ Email ID:__________________________ Date: ______________________ NOTE: If you can get Checkoff #2, there is no need to get checkoffs for the table in checkoff #1. Checkoff 1: Set the memory and register contents to the values listed in the respective columns for each instruction, then test the operation of your datapath. The IR value contains the encoding of the instruction:
Instruction Mem Value Register Value Correct Execution? ld r1, 0x10 Mem[0x10]=0x10 IR=0x ld r3, 0x14(r1) Mem[0x24]=0x24 IR=0x08c r1=0x ldr r5, 0x18 Mem[0x18]=0x01a Mem[0x1018]=0x104a
IR=0x117ff00c PC=0x
la r15, 0x10a8 Mem[0x10a8]=0xffff IR=0x2bc010a lar r15, 0x70 n/a IR=0x33c PC=0x0000104c add r2, r1, r3 n/a IR=0x r1=0x4, r3=0x addi r4, r5, 3 n/a IR=0x690a r5=0x sub r6, r7, r9 n/a IR=0x718e r7=0x8, r9=0x and r8, r11, r13 n/a IR=0xa216d r11=0xa, r13=0x andi r10, r2, 0x
n/a IR=0xaa r2=0x or r12, r4, r6 n/a IR=0xb r4=0xa, r6=0x ori r14, r8, 0x0f0f
n/a IR=0xbb900f0f r8=0xf0f brl r14, r15 n/a IR=0x4b9e PC=0x r15=0x10a brlpl r14, r15, r3 Mem[10a4]=0xf8000000 IR=0x4b9e3004, PC=0x1000, r15=0x10a4, r3=0xf brlpl r14, r15, r3 Mem[10a4]=0xf8000000 IR=0x4b9e3004, PC=0x1000, r15=10a4, r3=0x brzr r14, r1 n/a IR=0x401c1002, r14=0x1000, r1=0x brzr r14, r1 n/a IR=0x401c1002, r14=0x1000, r1=0x br r15 Mem[10a4]=0xf8000000 IR=0x401e0001, r15=10a st r0, 0x0100 n/a IR=0x18000100, r0=0x st r1, 0x0104(r0) n/a IR=0x18400104, r0=0x4, r1=0xbeef str r5, 0x0114 n/a IR=0x217ff098, r5=0x
Checkoff #2: If your datapath successfully executes the program stored in lab3binary.smokmem , then you will receive full credit for the lab without checkoffs needed for the table in checkoff 1. _________________________
