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2-bit Binary Adder Lab Report: Design and Implementation for EE-221 Digital Logic Design, Lab Reports of Digital Logic Design and Programming

National University of Science and Technology (NUST)Digital Logic Design and Programming

A lab report for a 2-bit binary adder design and implementation project in the EE-221 Digital Logic Design course. The report includes a block diagram, objectives, truth table, simplified functions using K-maps, and logic diagrams for the carry output (Cn) and sum output (Sn) of the adder.

Typology: Lab Reports

2019/2020

Uploaded on 05/13/2020

ahmad2246
ahmad2246 🇵🇰

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Group No.:02
Department of Electrical Engineering
Faculty Member: Ma’am Rabia Khalid Dated:
April___
Semester: Spring 2020 Section:
_____B____
EE-221: Digital Logic Design
Lab 9: 2-bit Binary Adder
PLO4/CLO4 PLO4/CLO4 PLO5/CLO5 PLO8/CLO6 PLO9/
CLO7
Name Reg. No Viva / Lab
Performanc
e
Analysis
of data in
Lab Report
Modern
Tool Usage
Ethics and
Safety
Individu
al and
Team
Work
Total
marks
Obtained
5 Marks 5 Marks 5 Marks 5 Marks 5 Marks 25 Marks
Muhammad Uzair Hasnain 295175
Muhammad Ahmad 282660
pf3
pf4
pf5

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Download 2-bit Binary Adder Lab Report: Design and Implementation for EE-221 Digital Logic Design and more Lab Reports Digital Logic Design and Programming in PDF only on Docsity!

Group No.:

Department of Electrical Engineering

Faculty Member: Ma’am Rabia Khalid Dated:

April___

Semester: Spring 2020 Section: _____B____

EE-221: Digital Logic Design Lab 9: 2-bit Binary Adder PLO4/CLO4 PLO4/CLO4 PLO5/CLO5 PLO8/CLO6 PLO9/ CLO Name Reg. No Viva / Lab Performanc e Analysis of data in Lab Report Modern Tool Usage Ethics and Safety Individu al and Team Work Total marks Obtained 5 Marks 5 Marks 5 Marks 5 Marks 5 Marks 25 Marks Muhammad Uzair Hasnain 295175 Muhammad Ahmad 282660

Lab Task:

  1. Implement a 2 bit adder with a carry in. Give the truth table and Logic diagram of the circuit as well. Your hardware implementation should have a visual display of both inputs and outputs. ^^ You may seek help from reference document (ignore the CMOS part) ANSWER: Block diagram:

This Lab Activity has been designed to familiarize the students with design and working of

binary adders using basic logic gates.

Objectives:

 Design and Implementation of 2 bit adder

The k map for Sn :

Simplified function for Sn :

Sn = Cn-1’An’Bn+ Cn-1’AnBn’+ Cn-1An’Bn’+ Cn-1AnBn

Logic Diagrams:

Logic diagram for Cn :

Logic diagram for Sn :