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Code Generation: A Simple Approach - Prof. Zijiang Yang, Study notes of Computer Science

Western Michigan University (WMU)Computer Science
Prof. Zijiang Yang

A chapter from the cs5810 spring 2008 course notes on code generation. It covers the basics of code generation, including the use of registers, register and address descriptors, and a code-generation algorithm. It also discusses managing register and address descriptors, an example of code generation, and peephole optimization.

Typology: Study notes

Pre 2010

Uploaded on 08/19/2009

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3/31/2008
1
CodeGeneration
Chapter8II
Chapter8:CodeGeneration 1CS5810Spring2008
ASimpleCodeGenerator
•Generatecodeforasinglebasicblock
•Howtouseregisters?
–Inmostmachinearchitectures,someorallofthe
operands must be in registers
operands
must
be
in
registers
–Registers makegoodtemporaries
–Holdvaluesthatarecomputedinonebasicblock
andusedinotherblocks
–Oftenusedwithrun‐timestoragemanagement
Chapter8:CodeGeneration CS5810Spring2008 2
RegisterandAddressDescriptors
•Foreachavailableregister,aregister
descriptor(RD)keepstrackofthevars whose
currentvalueinthatregister
–
Initially empty
–
Initially
empty
•Foreachvar,anaddressdescriptor(AD)keeps
trackofthelocationswherethecurrentvalue
ofthevar canbefound
–Locationcanbearegister,amemoryaddress,etc.
Chapter8:CodeGeneration CS5810Spring2008 3
Code‐generationAlgorithm
•Forathree‐addressinstruction,e.g.x=y+z
–UsegetReg(x=y+z) toselectregistersRx,Ry,Rzforx,y,z
–IfyisnotinRy,issueaninstructionLDRy,y’
•Similarlyforx
–
Issue the instruction ADD R
R
R
Issue
the
instruction
ADD
R
x,
R
y,
R
z
•Copystatementx=y
–Ifyisnotalreadyinregister,generateLDRy,y’
–AdjustRDforRysoitincludesx
–ChangeADforxsoitsonlylocationisRy
•Endingthebasicblock
–Ifxisusedatotherblocks,issueSTx,Rx
Chapter8:CodeGeneration CS5810Spring2008 4
ManagingRegisterandAddress
Descriptors
•ForLDR,x
–ChangeRDforRsoitholdsonlyx
–ChangeADforxbyaddingRasanadditionallocation
•
For ST x R
For
ST
x
,
R
–ChangeADforxtoincludeitsownmemorylocation
•ForADDRx,Ry,Rz
–ChangeRDforRxsoitholdsonlyx
–ChangeADforxsoitsonlylocationisRx
–RemoveRxfromtheADofanyvar otherthanx
Chapter8:CodeGeneration CS5810Spring2008 5
Example
t=a–b
u=a–c
v=t+u
a=d
Chapter8:CodeGeneration 6CS5810Spring2008
=v+u
•t,u,varetempvars,whilea,b,c,dareglobal
•Assumeregistersareenough
–Reuseregisterswheneverpossible
pf3
pf4
pf5

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Code Generation

Chapter 8 II

Chapter 8: Code Generation CS5810 Spring 2008 1

A Simple Code Generator

  • Generate code for a single basic block
  • How to use registers?
    • In most machine architectures, some or all of the operands must be in registersoperands must be in registers
    • Registers make good temporaries
    • Hold values that are computed in one basic block and used in other blocks
    • Often used with run‐time storage management

Chapter 8: Code Generation CS5810 Spring 2008 2

Register and Address Descriptors

  • For each available register, a register descriptor (RD) keeps track of the vars whose current value in that register - – Initially emptyInitially empty
  • For each var, an address descriptor (AD) keeps track of the locations where the current value of the var can be found - Location can be a register, a memory address, etc.

Chapter 8: Code Generation CS5810 Spring 2008 3

Code‐generation Algorithm

  • For a three‐address instruction, e.g. x=y+z
    • Use getReg(x=y+z) to select registers R (^) x , Ry, R (^) z for x, y , z
    • If y is not in Ry, issue an instruction LD Ry, y’
      • Similarly for x
    • Issue the instruction ADD RIssue the instruction ADD R (^) x , RR (^) y, RRz
  • Copy statement x=y
    • If y is not already in register, generate LD Ry, y’
    • Adjust RD for Ry so it includes x
    • Change AD for x so its only location is Ry
  • Ending the basic block
    • If x is used at other blocks, issue ST x, R (^) x Chapter 8: Code Generation CS5810 Spring 2008 4

Managing Register and Address

Descriptors

  • For LD R, x
    • Change RD for R so it holds only x
    • Change AD for x by adding R as an additional location
  • For ST x RFor ST x, R
    • Change AD for x to include its own memory location
  • For ADD R (^) x , Ry, R (^) z
    • Change RD for R (^) x so it holds only x
    • Change AD for x so its only location is R (^) x
    • Remove R (^) x from the AD of any var other than x

Chapter 8: Code Generation CS5810 Spring 2008 5

Example t = a – b u = a – c v = t + u a = d d

Chapter 8: Code Generation CS5810 Spring 2008 6

d = v + u

  • t, u, v are temp vars, while a, b, c, d are global
  • Assume registers are enough
    • Reuse registers whenever possible

Example

t = a ‐ b LD R1, a; LD R2, b; SUB R2, R1, R

a b c d

R1 R2 R3 a b c d t u v

R1 R2 R3 a b c d t u v

Chapter 8: Code Generation CS5810 Spring 2008 7

a t a,R1 b c d R

R1 R2 R3 a b c d t u v

u = a ‐ c LD R3, c; SUB R1, R1, R

u t c a b c,R3 d R2 R

R1 R2 R3 a b c d t u v

v = t + u ADD R3, R2, R

u t v a b c d R2 R1 R

R1 R2 R3 a b c d t u v

Chapter 8: Code Generation CS5810 Spring 2008 8

a = d LD R2, d

u a,d v R2 b c d,R2 R1 R

R1 R2 R3 a b c d t u v

d = v + u ADD R1, R3, R

d a v R2 b c R1 R

R1 R2 R3 a b c d t u v

Chapter 8: Code Generation CS5810 Spring 2008 9

ST a, R2; ST d, R

d a v a,R2 b c d,R1 R

R1 R2 R3 a b c d t u v

Function getReg

  • Consider picking Ry for y in x = y + z
    • If y in a register, do nothing
    • If y not in a register and there is a empty one, choose it as Rchoose it as Ry
    • Let v be one of the var in R
      • We are OK if v is somewhere besides R
      • We are OK if v is x
      • We are OK if v is not used later
      • Spill: ST v, R

Chapter 8: Code Generation CS5810 Spring 2008 10

Peephole Optimization

  • Exam a sliding window and replace instruction sequence with a shorter or faster sequence - Redundant‐instruction elimination - Flow of control optimizationFlow‐of‐control optimization - Algebraic simplifications - Use a machine idioms

Chapter 8: Code Generation CS5810 Spring 2008 11

Eliminating Redundant Loads and

Stores

LD a, R ST R0, a

Chapter 8: Code Generation CS5810 Spring 2008 12

Optimal Code Generation for

Expressions

  • We can choose registers optimally
    • If a basic block consists of a single expression, or
    • It is sufficient to generate code for a blcok one expression at a timeexpression at a time

Chapter 8: Code Generation CS5810 Spring 2008 19

Ershov Numbers

  • Assign the nodes of an expression tree a number that tells how many registers needed - Label leaf 1 - The label of an interior node with one child is theThe label of an interior node with one child is the label of its child - The label of an interior node with two children - the larger one if the labels are different - One plus the label if the labels are the same

Chapter 8: Code Generation CS5810 Spring 2008 20

Ershov Numbers

t

t

b e

t

t

a

Chapter 8: Code Generation CS5810 Spring 2008 21

t1 = a – b t2 = c + d t3 = e * t t4 = t1 + t

c d

(a‐b)+e*(c+d)

Generating Code From Labeled

Expression Tree

  • Recursive algorithm starting at the root
    • Label k means k registers will be used
    • R (^) b , R (^) b+1, …, R (^) b+k‐ 1 , where b>=1 is a base
  • To generate machine code for a node with label k and two children with equal labels - Recursively generate code for the right child, using base b+1: R (^) b+1, R (^) b+2, …, Result in R (^) b+k‐ 1 - Recursively generate code for the right child, using base b: R (^) b , R (^) b+1, …, Result in R (^) b+k‐ 2 - Generate instruction OP R (^) b+k‐ 1 , R (^) b+k‐ 2 ,R (^) b+k‐ 1

Chapter 8: Code Generation CS5810 Spring 2008 22

Generating Code From Labeled

Expression Tree

  • To generate machine code for a node with label k and two children with unequal labels - Recursively generate code for the child with label k using base b: Rk, using base b: Rbb , RRb 1b+1 , …, Result in RResult in Rb kb+k ‐ 11 - Recursively generate code for the child with label m, using base b: Rb, Rb+1 , …, Result in Rb+m‐ 1 - Generate instruction OP Rb+k‐ 1 , Rb+m‐ 1 ,Rb+k‐ 1
  • For a leaf x, if base is b generate LD Rb , x

Chapter 8: Code Generation CS5810 Spring 2008 23

Ershov Numbers

t

t b e

t

t

a

Chapter 8: Code Generation CS5810 Spring 2008 24

LD R3, d LD R2, c ADD R3, R2, R LD R2, e MUL R3, R2, R

c d

LD R2, b LD R1, a SUB R2, R1, R ADD R3, R2, R

Insufficient Supply of Registers

  • Input: a labeled tree and a number r of registers
  • For a node N with at least one child labeled r or greater - recursively generate code for the big child with b=1. The result will appear in R (^) r - Generate machine instruction ST t (^) k, R (^) r - If the little child has label r or greater, b=1. If the label is j<r, then b=r‐j. The result in R (^) r - Generate the instruction LD R (^) r‐ 1 , t (^) k - Generate OP R (^) r, R (^) r, R (^) r‐ 1 or OP R (^) r, R (^) r‐ 1 , R (^) r

Chapter 8: Code Generation CS5810 Spring 2008 25

Insufficient Supply of Registers

t

t

b e

t

t

a

Chapter 8: Code Generation CS5810 Spring 2008 26

LD R2, d LD R1, c ADD R2, R1, R LD R1, e MUL R2, R1, R ST t3, R

c d LD R2, b LD R1, a SUB R2, R1, R LD R1, t ADD R2, R2, R