Machine Language: Understanding MIPS Instruction Formats, Slides of Computer Science

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CSE 410Computer Systems

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Lecture 8 – Machine Language

Machine LanguageMachine

Language

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Machine language

,^

the binary representation for

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p

instructions.– We’ll see how MIPS machine language is

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esigned for the common case • Fixed-sized (32-bit) instructions• Only 3 instruction formats• Only 3 instruction formats• Limited-sized immediate fields

3

R

-type format

R type format•^

Register-to-register arithmetic instructions use the R-type format.

op

rs

rt

rd

shamt

func

6 bits

5 bits

5 bits

5 bits

5 bits

6 bits

•^

This format includes six different fields.^ —

op is an operation code or opcode that selects a specificoperation.

p —

rs and rt are the first and second source registers. —

rd is the destination register. —

shamt is only used for shift instructions. —

func is used together with op to select an arithmeticinstruction.

-^

The green card in the textbook lists opcodes and function codesfor all of the MIPS instructions

5

for

all of the MIPS instructions.

R

-type Instruction Example

R type Instruction Example

op

rs

rt

rd

shamt

func

6 bits

5 bits

5 bits

5 bits

5 bits

6 bits

add

$s

,^

$t

,^

$t

000000

01001

01010

10100

00000

100000

add

$s

,^

$t1, $t

6

I-type formatI type format•^

Load, store, branch, and immediate instructions all use the I-typeformatformat.

op

rs

rt

address

6 bits

5 bits

5 bits

16 bits

-^

For uniformity, op, rs and rt are in the same positions as in the R-format.

-^

The meaning of the register fields depends on the exact instruction

-^

The meaning of the register fields depends on the exact instruction.^ —

rs is a source register—an address for loads and stores, or anoperand for branch and immediate arithmetic instructions. —

rt is a source register for branches and stores, but a destination

i^

f^

h^

h^

I^

i^

i

register for the other I-type instructions.

-^

The address is a 16-bit signed two’s-complement value.– It can range from -32,768 to +32,767.– But that’s not always enough!

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-^

But

that s not always enough!

I-type Instruction ExamplesI type Instruction Examples

op

rs

rt

address

6 bits

5 bits

5 bits

16 bits

lw $t0, –4($sp)

100011

11101

01000

1111 1111 1111 1100

sw $a0, 16($sp)

101011

11101

00100

0000 0000 0001 0000

addi $s4, $t1, -

001000

01001

10100

1111 1111 1111 1111

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Loads and stores

Th

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it d 16

bit

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bl

f

Loads

and stores

-^

The limited 16-bit constant can present problems foraccesses to global data.

-^

Suppose we want to load from address 0x10010004,which won’t fit in the 16-bit address field. Solution:

lui

$at,

0x

#^

0x1001 0000

lw

$t1,

0x0004($at)

#^

Read

from

Mem[0x1001 0004]

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Sequential ExecutionSequential

Execution

-^

Recall that the processor executes instructions as

p

follows if there are no jumps or branches:

do {

fetch instruction at Mem[PC];PC = PC + 4; // advance to next instructionPC = PC + 4; // advance to next instructionexecute fetched instruction;

} while (processor not halted);} while (processor not halted);

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Larger branch constants •^

Empirical studies of real programs show that most branches go

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32 767 i

i^

b^

h

Larger branch constants

to targets less than 32,767 instructions away—branches aremostly used in loops and conditionals, and programmers aretaught to make code bodies short.

-^

If you do need to branch further you can use a jump with a

-^

If you do need to branch further, you can use a jump with abranch. For example, if “Far” is very far away, then the effect of:

beq

$s0, $s1, Far

...

can be simulated with the following actual code.

bne

$s0, $s1, Next

j^

Far

Next:

...

•^

Again, the MIPS designers have taken care of the common casefi

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first.

J

-type format

J type format•^

Finally, the jump instruction uses the J-type instruction format.

op

address

6 bits

26 bits

-^

The jump instruction contains a

word

address, not an offset

• Remember that each MIPS instruction is one word long, and

word addresses must be divisible by four.S

i^

t^

d^

f^

i^

“j^

t^

dd

4000 ” it’

h t

j^

t

• So instead of saying “jump to address 4000,” it’s enough to just

say “jump to instruction 1000.”

• A 26-bit address field lets you jump to any address from 0 to 2

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.

• your programs had better be smaller than 256MB

y^

p^

g

-^

For even longer jumps, the jump register, or jr, instruction can beused.

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jr

$ra

#^

Jump to 32-bit address

in

register

$ra

Decoding Machine LanguageDecoding

Machine Language

How do we convert 1s and 0s to assembly language and to

C (or Java or similar) code?

Machine language --> assembly

Æ

C?

For each 32 bits:1. Look at opcode to distinguish between R- Format,

JFormat and I-FormatJFormat, and I Format

2. Use instruction format to determine which fields exist3. Write out MIPS assembly code, converting each field to

name register number/name or decimal/hex numbername, register number/name, or decimal/hex number

4. Logically convert this MIPS code into valid C-like code.

Always possible? Unique?

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Decoding (1/7)Decoding

•^

Here are six machine language instructions in

g

g

hexadecimal:

hex

0005402A0005402A

hex

hex

hex

hex

20A5FFFF

hex

hex

•^

Assume the first instruction is at address4,194,

ten

(0x

hex

•^

Next step: convert hex to binary

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•^

Next

step: convert hex to binary

Decoding (3/7)Decoding

-^

Select the opcode (first 6 bits) to determine the format:

-^

Look at opcode: 0 means R-Format, 2 or 3 mean J-Format, otherwise I-Format

-^

Next step: separation of fields R R I R I J Format:

-^

Next step: separation of fields R R I R I J Format:

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Decoding (4/7)Decoding

-^

Fields separated based on format/opcode:

-^

Next step: translate (“disassemble”) MIPS assembly instructions RR I R I J Format:

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