Machine-Level Programming I Basics, Lecture Slide - Computer Science, Slides of Computer System Design and Architecture

Download Machine-Level Programming I Basics, Lecture Slide - Computer Science and more Slides Computer System Design and Architecture in PDF only on Docsity!

Machine-­‐Level Programming I: Basics

15-­‐213/18-­‐243: Introduc3on to Computer Systems 4 th Lecture, Sep. 2, 2010 Instructors: Randy Bryant and Dave O’Hallaron

Today: Machine Programming I: Basics

 History of Intel processors and architectures

 C, assembly, machine code

 Assembly Basics: Registers, operands, move

 Intro to x86-­‐

Intel x86 EvoluJon: Milestones

Name Date Transistors MHz

 8086 1978 29K 5-­‐

 First 16-­‐bit processor. Basis for IBM PC & DOS

 1MB address space

 386 1985 275K 16-­‐

 First 32 bit processor , referred to as IA

 Added “flat addressing”

 Capable of running Unix

 32-­‐bit Linux/gcc uses no instruc3ons introduced in later models

 PenJum 4F 2004 125M 2800-­‐

 First 64-­‐bit processor, referred to as x86-­‐

 Core i7 2008 731M 2667-­‐

 Our shark machines

Intel x86 Processors: Overview

X86-­‐64 / EM64t

X86-­‐32/IA

X86-­‐16 8086

286 386 486 PenJum PenJum MMX PenJum III PenJum 4 PenJum 4E PenJum 4F Core 2 Duo Core i

IA: o[en redefined as latest Intel architecture

Jme

Architectures Processors

MMX SSE SSE SSE SSE

More InformaJon

 Intel processors (Wikipedia)

 Intel microarchitectures

New Species: ia64, then IPF, then Itanium,…

Name Date Transistors

 Itanium 2001 10M

 First shot at 64-­‐bit architecture: first called IA

 Radically new instruc3on set designed for high performance

 Can run exis3ng IA32 programs

 On-­‐board “x86 engine”

 Joint project with Hewlef-­‐Packard

 Itanium 2 2002 221M

 Big performance boost

 Itanium 2 Dual-­‐Core 2006 1.7B

 Itanium has not taken off in marketplace

 Lack of backward compa3bility, no good compiler support, Pen3um

4 got too good

Intel’s 64-­‐Bit

 Intel Adempted Radical Shi[ from IA32 to IA

 Totally different architecture (Itanium)

 Executes IA32 code only as legacy

 Performance disappoin3ng

 AMD Stepped in with EvoluJonary SoluJon

 x86-­‐64 (now called “AMD64”)

 Intel Felt Obligated to Focus on IA

 Hard to admit mistake or that AMD is befer

 2004: Intel Announces EM64T extension to IA

 Extended Memory 64-­‐bit Technology

 Almost iden3cal to x86-­‐64!

 All but low-­‐end x86 processors support x86-­‐

 But, lots of code s3ll runs in 32-­‐bit mode

Our Coverage

 IA

 The tradi3onal x

 x86-­‐64/EM64T

 The emerging standard

 PresentaJon

 Book presents IA32 in Sec3ons 3.1—3.

 Covers x86-­‐64 in 3.

 We will cover both simultaneously

 Some labs will be based on x86-­‐64, others on IA

DefiniJons

 Architecture: (also instrucJon set architecture: ISA) The

parts of a processor design that one needs to understand

to write assembly code.

 Examples: instruc3on set specifica3on, registers.

 Microarchitecture: ImplementaJon of the architecture.

 Examples: cache sizes and core frequency.

 Example ISAs (Intel): x86, IA, IPF

CPU

Assembly Programmer’s View

 Programmer-­‐Visible State  PC: Program counter  Address of next instruc3on  Called “EIP” (IA32) or “RIP” (x86-­‐64)  Register file  Heavily used program data  Condi3on codes  Store status informa3on about most recent arithme3c opera3on  Used for condi3onal branching

PC

Registers

Memory

Object Code Program Data OS Data Addresses Data Instruc3ons

Stack

CondiJon

Codes

 Memory

 Byte addressable array  Code, user data, (some) OS data  Includes stack used to support procedures

Compiling Into Assembly

C Code

int sum(int x, int y) { int t = x+y; return t; }

Generated IA32 Assembly

sum: pushl %ebp movl %esp,%ebp movl 12(%ebp),%eax addl 8(%ebp),%eax popl %ebp ret

Obtain with command

/usr/local/bin/gcc –O1 -S code.c

Produces file code.s

Some compilers use

instrucJon “leave”

Assembly CharacterisJcs: Data Types

 “Integer” data of 1, 2, or 4 bytes

 Data values

 Addresses (untyped pointers)

 FloaJng point data of 4, 8, or 10 bytes

 No aggregate types such as arrays or structures

 Just con3guously allocated bytes in memory

Code for sum

0x401040 : 0x 0x 0xe 0x8b 0x 0x0c 0x 0x 0x 0x5d 0xc

Object Code

 Assembler

 Translates .s into .o

 Binary encoding of each instruc3on

 Nearly-­‐complete image of executable code

 Missing linkages between code in different

files

 Linker

 Resolves references between files

 Combines with sta3c run-­‐3me libraries

 E.g., code for malloc, printf

 Some libraries are dynamically linked

 Linking occurs when program begins execu3on

• Total of 11 bytes
• Each instrucJon 1, 2, or 3 bytes
• Starts at address 0x

Machine InstrucJon Example

 C Code

 Add two signed integers

 Assembly

 Add 2 4-­‐byte integers

 “Long” words in GCC parlance  Same instruc3on whether signed or unsigned

 Operands:

x: Register %eax y: Memory M[%ebp+8] t: Register %eax

• Return func3on value in %eax

 Object Code

 3-­‐byte instruc3on

 Stored at address 0x80483ca

*int t = x+y; addl 8(%ebp),%eax 0x80483ca: 03 45 08 Similar to expression: x += y More precisely: int eax; int ebp; eax += ebp[2]