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Machine-Level Programming I:
Introduction
Sept. 8, 1998
Topics
- Assembly Programmer’s Execution Model
- Arithmetic Instructions
- Memory Instructions
- Transfers of Control
- Comparison to actual Alpha 21164 processor
class05.ppt
“The course that gives CMU its Zip!”
Alpha Processors
Reduced Instruction Set Computer (RISC)
- Simple instructions with regular formats
- Key Idea: make the common cases fast!
- infrequent operations can be synthesized using multiple instructions
Assumes compiler will do optimizations
- e.g., scalar optimization, register allocation, scheduling, etc.
- ISA designed for compilers , not assembly language programmers
A 2nd Generation RISC Instruction Set Architecture
- Designed for superscalar processors ( > 1 inst per cycle)
- Designed as a 64-bit ISA from the start
Very High Performance Machines
- Alpha has been the clear performance leader for many years now
text
text
binary
binary
Compiler ( gcc -S )
Assembler ( gcc or as )
Linker ( gcc or ld )
C program ( p1.c p2.c )
Asm program ( p1.s p2.s )
Object program ( p1.o p2.o )
Executable program ( p )
libraries ( .a )
Turning C into Object Code
- Code in files p1.c p2.c
- Compile with command: gcc -O p1.c p2.c -o p
- Use optimizations (-O)
- Put resulting binary in file p
Compiling Into Assembly
C Code
long int arith(long int x, long int y, long int z) { long int t1 = x+y; long int t2 = z+t1; long int t3 = x+4L; long int t4 = y * 48L; long int t5 = t3 + t4; long int rval = t2 * t5; return rval; }
Generated Assembly
arith: arith..ng: .frame $30,0,$26, .prologue 0 addq $16,$17,$ addq $18,$1,$ addq $16,4,$ s4subq $17,$17,$ sll $17,4,$ addq $16,$17,$ mulq $0,$16,$ ret $31,($26), Obtain with command .end^ arith gcc -O -S code.c Produces file code.s
Code for arith
0x1200012d0: 0x 0x 0x 0x 0x4a 0x 0x4c 0x6bfa
Object Code
Assembler
- Translates .s into .o
- Binary encoding of each instruction
- Nearly-complete image of executable code
- Missing linkages between code in different files
Linker
- Resolves references between files
- Combines with run-time libraries
- At the very least includes libc.a
- E.g., code for malloc, printf
- Total of 8 instructions
- Each 4 bytes
- Starts at address 0x1200012d
Machine Instruction Example
C Code
- Add two signed 64-bit integers
Assembly
- Add 2 8-byte integers
- “Quad” words in Alpha parlance
- Same instruction whether signed or unsigned
- Operands & result in registers: $16: x $17: y $1: t
Object Code
- 32-bit pattern
- Stored at address 0x1200012d
long int t1 = x+y;
addq $16,$17,$
0x1200012d0: 0x
Object
0x1200012d0: 0x 0x 0x 0x 0x4a 0x 0x4c 0x6bfa
Disassembled
0x1200012d0: 42110401 addq r16, r17, r 0x1200012d4: 42410400 addq r18, r1, r 0x1200012d8: 42009410 addq r16, 0x4, r 0x1200012dc: 42310571 s4subq r17, r17, r 0x1200012e0: 4a209731 sll r17, 0x4, r 0x1200012e4: 42110410 addq r16, r17, r 0x1200012e8: 4c100400 mulq r0, r16, r 0x1200012ec: 6bfa8001 ret r31, (r26), 1
Disassembling Object Code
Disassembler
dis -h p
- Useful tool for examining object code
- Analyzes bit pattern of series of instructions
- Produces approximate rendition of assembly code
- Can be run on either a.out (complete executable) or .o file
Implementing Arithmetic Operations
1. Fetch
IR = Mem[PC] a = Reg[Ra] b = Reg[Rb]
P
C
I
R
Register File
A
L
U
Memory
Opcode + Func
Ra
Rb Rc
a
b
c
Instruction Address
Instruction Result
2. Execute
c = a b
3. Update
Reg[Rc] = c PC = PC + 4
Executing Arith
arith(x, y, z) { t1 = x+y; t2 = z+t1; t3 = x+4L; t4 = y * 48L; t5 = t3 + t4; rval = t2 * t5; return rval; }
addq $16,$17,$ addq $18,$1,$ addq $16,4,$ s4subq $17,$17,$ sll $17,4,$ addq $16,$17,$ mulq $0,$16,$ ret $31,($26),
Op a b addq a + b s4subq 4*a - b sll a << b mulq a * b
- t1 x y z t2 t1 x y z t2 t1 t3 y z t2 t1 t3 3*y z t2 t1 t3 t4 z t2 t1 t5 t4 z rval t1 t5 t4 z
Logical Operation Example
- Logical operations similar to arithmetic operations
- Both have two formats
- RR: Operands a and b from registers
- RI: Operand a from register, b is 8-bit unsigned “literal”
long int logical(long int x, long int y) { long int t1 = x^y; long int t2 = t1 >> 17; long int mask = (1L<<13) - 7L; long int rval = t2 & mask; return rval; }
Opcode Ra Rb 000 0 Func Rc
Opcode Ra Lit 1 Func Rc
Load & Store Instructions
Load Operation
- Read (load) from memory
- Write to register ldq Ra, Offset(Rb)
- Arguments Ra Destination Reg. Rb Base address Reg. Offset Offset from base » Between –32,768 and 32,
- Effective Address EA = Reg[Rb] + Offset
- Operation Reg[Ra] = Mem[EA]
Opcode Ra Rb Offset
Store Operation
- Read from register
- Write (store) to memory stq Ra, Offset(Rb)
- Arguments Ra Source Reg. Rb Base address Reg. Offset Offset from base » Between –32,768 and 32,
- Effective Address EA = Reg[Rb] + Offset
- Operation Mem[EA] = Reg[Ra]
Implementing Load Operation
1. Fetch
IR = Mem[PC] b = Reg[Rb]
P
C
I
R
Register File
A
L
U
Memory
Ra
Rb
Offset
b (^) EA = b+Offset
Instruction Address
Instruction
2. Execute
EA = b + Offset Result = Mem[EA]
3. Update
Reg[Ra] = Result PC = PC + 4
Mem[EA]
Load & Store Example
Realization of C Pointers
- Pointer is address of object
- Manipulated as 64-bit signed integer
- Machine has no notion of pointer type
- Does not distinguish (char *), (int *), (int **), etc.
void swap(long int *xp, long int *yp) { long int t0 = *xp; long int t1 = *yp; *xp = t1; *yp = t0; }
Executing Swap
swap(*xp, *yp) { t0 = *xp; t1 = *yp; *xp = t1; *yp = t0; }
ldq $1,0($16)
ldq $2,0($17)
stq $2,0($16)
stq $1,0($17)
ret $31,($26),
$1 $2 $16 $17 Mem[xp]
Mem[yp] Y X - xp yp X X Y xp yp X X Y xp yp Y X Y xp yp Y
Y
Y
Y
X
