Understanding Memory Types and Their Classification in Microprocessors, Slides of Microcontrollers

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Memories

The third key component of a microprocessor-based

system (besides the CPU and I/O devices).

• Classification
• Physical and external configuration
• Timing
• Types

Basic Categories

Writable?

• Read-Only Memory (ROM):
  • Can only be read; cannot be modified (written) by the

processor. Contents of ROM chip are set before chip is

placed into the system.

• Random-Access Memory (RAM) :
  • Read/write memory. Although technically inaccurate,

term is used for historical reasons. (ROMs are also

random access.)

Savable?

• Volatile memories
  • Lose their contents when power is turned off. Typically

used to store program while system is running.

• Non-volatile memories do not.
  • Required by every system to store instructions that get

executed when system powers up (boot code).

Memory Array

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

Mem Cell

word lines

bit lines

Different memory types are distinguished by technology for

storing bit in memory cell.

Why square??

Support Circuitry

memory

array

16 bits (4x4)

2 to 4 decoder

A

A

A

A

4:1 mux/demux

OE#

CS#

WE#

Control signals: D

• Control read/write of array
• Map internal physical array to external configuration (4x4  16x1)

Interface (2/2)

• Chip Select (CS#): Enables device. If not

asserted, device ignores all other inputs

(sometimes entering low-power mode).

• Write Enable (WE#): Store D0 at specified

address.

• Output Enable (OE#): Drive value at specified

address onto D0.

Memory Timing: Reads

• Access time : Time required from start of a read access to valid data output. - Access time specified for each of the three

conditions required for valid data output (valid

address, chip select, output enable)

• Time to valid data out depends on which of these is on critical path.
• tRC: Minimum time required from start of one access to start of next.
  • For most memories equal to access time.

tRC

ADDR

CS#

OE#

DATA

tAV

tCS

tOE

Memory Timing: Writes

ADDR

CS#

WE#

DATA

tWC

tAW

tCW

tWP

tAS

tDS tDH

• Write happens on rising edge of WE’.
• Separate access times tAW, tCW, tWP specified for address valid, CS#, WE#.
• Typically, tAS = 0, meaning that WE# may not be asserted before address is valid.
• Setup and hold times required for data.
• Write cycle time tWC is typically in the order of tAW.

Static RAM

• Volatile memory
• Each cell is basically a flip-flop
• 4 —6 transistors per cell  relatively poor density
• Very fast (access times under 1ns commonplace)
• Reads/writes at same speed

word line

bit line + bit line -

Memory Timing: Reads

• Access time : Time required from start of a read access to valid data output. - Access time specified for each of the three

conditions required for valid data output (valid

address, chip select, output enable)

• Time to valid data out depends on which of these is on critical path.
• tRC: Minimum time required from start of one access to start of next.

tRC

ADDR

CS#

OE#

DATA

tAV

tCS

tOE

Mask ROM

• By far the simplest technique.
• Presence/absence of diode at each cell denotes binary value.
• Pattern of diodes defined by mask used in fabrication process.
• Contents fixed when the chip is made; cannot be changed.
• Large setup cost (design mask), small marginal cost.
• Good for high-volume applications where upgrading contents

is not an issue.

• What value is stored by

presence of diode?

word

lines

bit lines

UV Erasable PROM (EPROM)

• Replace PROM fuse with pass transistor controlled by ―floating‖ (i.e. electrically insulated) gate.
• Program by charging gate to switch pass transistor. (Use special ―burner‖ to apply high voltage that overcomes insulation.)
• Erase by discharging all gates using ultraviolet light. (UV photons carry electrons across insulation.)
• Insulation eventually breaks down  limited number of erase/reprogram cycles (100s to 1000s).
• Costly: Requires special package with window.
• Largely displaced by flash memory.

Electrically Erasable PROM (EEPROM)

• Similar to UV EPROM, but with on-chip circuitry to electrically charge/discharge floating gates (no UV).
• Writable by CPU  really a RAM despite name.
• Reads/wites much like generic RAM: Internal circuitry erases affected byte/word, then reprograms to new value.
• Write cycle in the order of a millisecond.
• High voltage input (e.g. 12V) required for writing.
• Limited number of write cycles (1000s).
• Selective erasing requires extra circuitry in each memory cell  Lower density and higher cost than EPROM.

Flash Applications

• Flash technology has made rapid advances in recent years.
  • cell density rivals DRAM; better than EPROM; much better than EEPROM.
  • multiple gate voltages can encode 2 bits per cell.
  • many-GB devices available
• ROMs and EPROMs rapidly becoming obsolete.
• Replacing hard disks in some applications.
  • smaller, lighter, faster
  • more reliable (no moving parts)
  • cost effective
• PDAs, cell phones, laptops, iPods, etc…

Memories in our setup…

• Internal SRAM
  • 26 KB Fast SRAM
• Internal Flash EEPROM
  • 448 KB – 5 V programming
  • The programming power can be Enabled/Disabled via the config switches
• External EPROM
  • U2/U3 – Holds the monitor program shipped with the board.
• External SRAM
  • 512 KB – U4-U
• External Flash EEPROM
  • 512 KB – U15/U16 (underneath the EPROMS)