Analog to Digital - Microcontroller Systems - Lecture Slides, Slides of Microcontrollers

In the class of computer sciences, we have a special class for the Microcontroller Systems. The main points in these slides are:Analog to Digital, Microprocessor-Based System, Sampling Theorem, Analog and Digital Signals, Conversion Concepts, Conversion Circuitry, Data Transmission, Interface Microprocessors, Digital Conversion

Typology: Slides

2012/2013

Uploaded on 04/24/2013

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Analog to Digital (and back again)
Interfacing a microprocessor-based system to the real
world.
Analog and digital signals
The bridge: Sampling Theorem
Conversion concepts
Conversion circuitry
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Analog to Digital (and back again)

Interfacing a microprocessor-based system to the real

world.

• Analog and digital signals

• The bridge: Sampling Theorem

• Conversion concepts

• Conversion circuitry

Analog Signals

  • The real world is analog.
  • Signals vary continuously with time.
  • Analog signals take arbitrarily many values.
  • Examples:
    • audio signal from microphone or cassette player
    • video signal from VCR or video camera
    • x/y voltage outputs from joystick

time

x(t) continuous range

Analog vs. Digital

To compute on a Microprocessor, we need a digital value.

And by “compute”, we mean:

  • making decisions based on signals
  • combining multiple signals together
  • analyze the signal for a data transmission
  • generate a modification of the signal

Signal Conversion

  • To interface microprocessors to real-world (analog) systems, we need converters.
  • Digital to Analog Converters (DAC): Convert a digital input (e.g. binary word) to analog output (e.g. current or voltage).
  • Analog to Digital Converters (ADC): Convert an analog input to digital output.

analog digital

ADC

DAC

mP

mic

speaker

mechanical

mechanical

electrical

electrical electrical

electrical

Conversion of Signals over Time

  • Must hold input signal while converting.
  • “Sample and hold” circuit takes in (samples) analog value and holds it still while A to D conversion is taking place.
  • What is the minimum rate S at which the analog input should be sampled?
  • Minimum sampling rate S determines the minimum acceptable speed of A to D conversion.

Sample and hold

n-bit ADC

n analog analog (^) digital

Sampling

  • Sampling rate must be high enough so that “no information is lost”.
  • What is the information of a signal?

Basic Converter Characteristics

Resolution : Fraction of analog range as defined by the number of bits on the digital side of the converter.

  • An n-bit ADC divides analog voltage range [0 , Vmax] into _____ sections and its resolution is _____ of Vmax.

Error : Difference between analog value you believe a digital value represents and what that analog value actually is.

  • Even ideal converters introduce some error.

Quantization Error

0

Vmax

¾ Vmax

½ Vmax

¼ Vmax

00 01 10 11

analog input

quantization error

  • Inherent in converting continuous values to a finite number of discrete values.
    • Every voltage in the range [1/2 Vmax , ¾ Vmax) is mapped to “10”.
    • To minimize worst-case error, we assume that “10” means _____ Vmax.
    • Worst-case error is __________.
  • For normalization, quantization error is expressed in terms of the ideal analog difference represented by a unit change in the digital value, referred to as LSB.
  • Quantization error is always equal to +/- ½ LSB.

ADC #2: Single-Slope Integration

+_

Vin

n-bit counter CLK

EN*

Vcc

done

  • Start: Reset counter, discharge C.
  • Charge C at fixed current I until Vc > Vin. How should C, I, n, and CLK be related?
  • Final counter value is Dout.
  • Conversion may take several milliseconds.

I C

ADC #3: Successive Approximation (1/2)

+_ Vin

DAC

Vref

n

CLK^ control

successive approximation register

Dout

  • Binary search to match input voltage.
  • Conversion time > n times DAC settling time.
  • Input should stay stable throughout conversion.

DAC #1: Voltage Divider

2-to-4 decoder

2

Din

Vout

Vref

R

R

R

R

DAC #2: R/2R Ladder

D3 (MSB) D2 D1 D0 (LSB)

2R 2R 2R 2R

R R R 2R

Iout

Vref