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Memory and Storage - 1
Martin B.H. Weiss University of Pittsburgh
Memory and Storage
• Main Memory
Å Fast Access
Å Directly Accessable by CPU
Å Usually RAM or ROM
• Secondary Storage
Å Access Via I/O Subsystem
Å Normally Disk Storage
Martin B.H. Weiss
Tele 2060
Structure of Memory
b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0
Register N (Location N) Register N-1 (Location N-1) Register N-2 (Location N-2)
Register 1 (Location 1) Register 0 (Location 0)
• An Array of “Registers”
• Each “Register” is a Memory Location
Memory and Storage - 3
Martin B.H. Weiss University of Pittsburgh
Structure of Memory
• Data is Organized in Words
Å Contains the Maximum Number of Bits the CPU Can Utilize
Larger Words Imply the Ability to Deal with Larger Numbers Smaller CPU's Must Make Multiple Fetches to Memory
Å Processors Are Classified According to Word Size
• Words Are Stored in Memory Locations
• Memory Locations Have an Address
Å This is Equivalent to the Register Number
Å Also, The Location
Martin B.H. Weiss
Tele 2060
Random-Access Memory (Read-Write)
• Memory Locations Can be Accessed in Any Order (i.e.,
Randomly)
• An Address is Decoded into a Memory Location By a n-to-2 n
Decoder
• Dynamic RAM's
Å Data Are Stored in Small Capacitors
Å Must Be Refreshed Periodically
• Static RAM's
Å Data Are Stored in Flip Flop's
Å No Refresh Is Necessary
• Non-Volatile RAM's
Å Do Not Lose Their Contents After Power is Turned Off
Å May Be Dynamic or Static RAM's
Memory and Storage - 7
Martin B.H. Weiss University of Pittsburgh
Basic Cell for Static RAMs
Data Input
Select
Read/Write
Data Output
S
R
Q
Martin B.H. Weiss
Tele 2060
Physical Structure of Dynamic RAMs
n to 2 n Decoder
n
2 n 2 n^ - 2 n^ - 2 n^ -
b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0
Line Drivers & Voltage Converters
A d d r e s s
Data
Read/ Write
Memory and Storage - 9
Martin B.H. Weiss University of Pittsburgh
Read-Only Memory
• Memory Contents Are Fixed (Permanently Programmed)
Å Permanent Changes Are Often Made at a Device Level
Å Burning A Silicon Fuse
Å Causing Physical Material Changes By High Voltage
• Programmable Read-Only Memory (PROM)
• Erasable Programmable ROM (EPROM)
• Electrically Alterable ROM (EAROM)
Martin B.H. Weiss
Tele 2060
Sequential Access Memory
• Data Must Be Accessed in a Sequence With Other Data
• Direct Access
Å The Computer Can Directly Access the Storage Medium
Å Occurs Via a Transducer
Å Via the I/O Subsystem
Å DASD is the IBM Acronym for Disk Storage
• Indirect Access
Å Tape Subsystem
Å Intermediate System Is Required
Memory and Storage - 13
Martin B.H. Weiss University of Pittsburgh
Programmable Logic Device
• Allows the development of inexpensive “custom” chip functions
• Types of PLDs
Å PROM
Form of Memory Device Program the Truth Table of a Function
Å Programmable Logic Array (PLA)
Standard Chip Based on Minterm Structure of Boolean Expressions Inputs Connected by Fuses to AND/OR gates
Å PAL
Similar to PLAs Easier to Program than a PLA
Martin B.H. Weiss
Tele 2060
Structure of PLAs
A
B
C
F 1
F 2
F 3
F 4
Martin B.H. Weiss
Programmable Logic Arrays
• Procedure
Å Write Combinational Logic as Sum of Minterms
Å Program Minterms in First Array
Å Program Sums in Second Array
Å Programming by Burning Fuses
• Programmable Array Logic (PAL)
Å Like PLA
Å OR is not Programmable
