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Microprocessor & Microcontroller Lab Manual: 8085, 8086, and 8051, Summaries of Microprocessors

SRM Institute Of Science & Technology Microprocessors

This comprehensive lab manual provides a detailed guide to programming 8085, 8086, and 8051 microprocessors. It covers fundamental concepts, instruction sets, and practical exercises for each processor. The manual includes pin diagrams, addressing modes, and examples of programs for various tasks, such as addition, subtraction, multiplication, and data manipulation. It is a valuable resource for students and professionals seeking to learn and apply microprocessor programming techniques.

Typology: Summaries

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Uploaded on 11/12/2024

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LABORATORY MANUAL

PROGRAMME: B.Tech

SEMESTER /YEAR: 3rd year 5th Semester

SUBJECT CODE: BM0313

SUBJECT NAME: Microprocessor & Microcontroller Lab

Prepared By:

Name: A Bhargavi Haripriya

Designation: Assistant Professor (OG)

DEPARTMENT OF BIOMEDICAL ENGINEERING

SCHOOL OF BIOENGINEERING,

FACULTY OF ENGINEERING & TECHNOLOGY

SRM UNIVERSITY

(UNDER SECTION 3 of UGC ACT 1956)

KATTANKULATHUR-603203

Tamil Nadu, India

Discover Summaries of Microprocessors SRM Institute Of Science & Technology

Partial preview of the text

Download Microprocessor & Microcontroller Lab Manual: 8085, 8086, and 8051 and more Summaries Microprocessors in PDF only on Docsity!

LABORATORY MANUAL

PROGRAMME: B.Tech

SEMESTER /YEAR : 3

year 5

Semester

SUBJECT CODE: BM

SUBJECT NAME: Microprocessor & Microcontroller Lab

Prepared By:

Name: A Bhargavi Haripriya

Designation: Assistant Professor (OG)

DEPARTMENT OF BIOMEDICAL ENGINEERING

SCHOOL OF BIOENGINEERING,

FACULTY OF ENGINEERING & TECHNOLOGY

SRM UNIVERSITY

(UNDER SECTION 3 of UGC ACT 1956)

KATTANKULATHUR-

Tamil Nadu, India

Contents

8085 Pin Diagram
8085 Instruction Set
8085 Programs 1. To perform 8-bit addition using accumulator 2. 8 bit addition using memory register 3. 8 bit subtraction using accumulator 4. 8-bit subtraction using memory register 5. Addition of BCD number 6. 16-bit addition using accumulator 7. 16-bit addition using register pair 8. 16-bit subtraction using accumulator 9. BCD subtraction 10. 8-bit multiplication using memory register 11. Hexadecimal division 12. Adding an array of data 13. Smallest element in an array 14. Largest element in an array 15. Fibonacci series 16. Arrange elements in ascending order 17. Arrange elements in descending order
I/O Interfacing

8085 Pin Diagram

| _ _ |

| | _/ |_ |

| --> X1 ||1 40|| Vcc (+5V) | | | | | | --> X2 ||2 39|| HOLD <-- | | | | | | <-- RESET OUT ||3 38|| HLDA --> | | | | | | <-- SOD ||4 37|| CLK (OUT) --> | | | | ________ | | --> SID ||5 36|| RESET IN <-- | | | | | | --> TRAP ||6 35|| READY <-- | | | | _ | | --> RST 7.5 ||7 34|| IO/M --> | | | | | | --> RST 6.5 ||8 33|| S1 --> | | | | __ | | --> RST 5.5 ||9 32|| RD --> | | | | __ | | --> INTR ||10 8085A 31|| WR --> | | ____ | | | | <-- INTA ||11 30|| ALE --> | | | | | | <--> AD0 ||12 29|| S0 --> | | | | | | <--> AD1 ||13 28|| A15 --> | | | | | | <--> AD2 ||14 27|| A14 --> | | | | | | <--> AD3 ||15 26|| A13 --> | | | | | | <--> AD4 ||16 25|| A12 --> | | | | | | <--> AD5 ||17 24|| A11 --> | | | | | | <--> AD6 ||18 23|| A10 --> | | | | | | <--> AD7 ||19 22|| A9 --> | | | | | | (Gnd) Vss ||20 21|| A8 --> | | |______________________| | | | | | | | | Copyright (C) J.P.Bowen 1985|

8085 Instruction Set

Instructions can be categorized according to their method of addressing the

hardware registers and/or memory.

Implied Addressing:

The addressing mode of certain instructions is implied by the instruction’s

function. For example, the STC (set carry flag) instruction deals only with the

carry flag, the DAA (decimal adjust accumulator) instruction deals with the

accumulator.

Register Addressing:

Quite a large set of instructions call for register addressing. With these instructions,

you must specify one of the registers A through E, H or L as well as the operation

code. With these instructions, the accumulator is implied as a second operand. For

example, the instruction CMP E may be interpreted as 'compare the contents of the

E register with the contents of the accumulator.

Immediate Addressing:

Instructions that use immediate addressing have data assembled as a part of the

instruction itself. For example, the instruction CPI 'C' may be interpreted as

‘compare the contents of the accumulator with the letter C. When assembled, this

instruction has the hexadecimal value FE43. Hexadecimal 43 is the internal

representation for the letter C. When this instruction is executed, the processor

fetches the first instruction byte and determines that it must fetch one more byte.

The processor fetches the next byte into one of its internal registers and then

performs the compare operation.

Direct Addressing:

Jump instructions include a 16-bit address as part of the instruction. For example,

the instruction JMP 1000H causes a jump to the hexadecimal address 1000 by

replacing the current contents of the program counter with the new value 1000H.

Instructions that include a direct address require three bytes of storage: one for the

instruction code, and two for the 16-bit address

Instruction Naming Conventions:

The mnemonics assigned to the instructions are designed to indicate the function of

the instruction. The instructions fall into the following functional categories:

Data Transfer Group:

The data transfer instructions move data between registers or between memory and

registers.

MOV Move

MVI Move Immediate

LDA Load Accumulator Directly from Memory

STA Store Accumulator Directly in Memory

LHLD Load H & L Registers Directly from Memory

SHLD Store H & L Registers Directly in Memory

An 'X' in the name of a data transfer instruction implies that it deals with a register

pair (16-bits);

LXI Load Register Pair with Immediate data

LDAX Load Accumulator from Address in Register Pair

STAX Store Accumulator in Address in Register Pair

XCHG Exchange H & L with D & E

XTHL Exchange Top of Stack with H & L

Arithmetic Group :

The arithmetic instructions add, subtract, increment, or decrement data in registers

or memory.

ADD Add to Accumulator

ADI Add Immediate Data to Accumulator

ADC Add to Accumulator Using Carry Flag

ACI Add Immediate data to Accumulator Using Carry

SUB Subtract from Accumulator

SUI Subtract Immediate Data from Accumulator

SBB Subtract from Accumulator Using Borrow (Carry) Flag

SBI Subtract Immediate from Accumulator Using Borrow (Carry)

Flag

INR Increment Specified Byte by One

DCR Decrement Specified Byte by One

INX Increment Register Pair by One

DCX Decrement Register Pair by One

DAD Double Register Add; Add Content of Register

Pair to H & L Register Pair

Logical Group:

This group performs logical (Boolean) operations on data in registers and memory

and on condition flags.

The logical AND, OR, and Exclusive OR instructions enable you to set specific

bits in the accumulator ON or OFF.

ANA Logical AND with Accumulator

ANI Logical AND with Accumulator Using Immediate Data

ORA Logical OR with Accumulator

OR Logical OR with Accumulator Using Immediate Data

XRA Exclusive Logical OR with Accumulator

XRI Exclusive OR Using Immediate Data

The Compare instructions compare the content of an 8-bit value with the contents

of the accumulator;

CMP Compare

CPI Compare Using Immediate Data

The rotate instructions shift the contents of the accumulator one bit position to the

left or right:

RLC Rotate Accumulator Left

RRC Rotate Accumulator Right

RAL Rotate Left Through Carry

RAR Rotate Right Through Carry

Complement and carry flag instructions:

Two other instructions can affect a branch by replacing the contents or the program

counter:

PCHL Move H & L to Program Counter

RST Special Restart Instruction Used

with Interrupts

Stack I/O, and Machine Control Instructions:

The following instructions affect the Stack and/or Stack Pointer:

PUSH Push Two bytes of Data onto the Stack

POP Pop Two Bytes of Data off the Stack

XTHL Exchange Top of Stack with H & L

SPHL Move content of H & L to Stack Pointer

The I/0 instructions are as follows:

IN Initiate Input Operation

OUT Initiate Output Operation

The Machine Control instructions are as follows:

EI Enable Interrupt System

DI Disable Interrupt System

HLT Halt

NOP No Operation

|Mnemonic |Op|SZAPC|~s|Description |Notes | |---------+--+-----+--+--------------------------+-------------| |ACI n |CE|*****| 7|Add with Carry Immediate |A=A+n+CY | |ADC r |8F|*****| 4|Add with Carry |A=A+r+CY(21X)| |ADC M |8E|*****| 7|Add with Carry to Memory |A=A+[HL]+CY | |ADD r |87|*****| 4|Add |A=A+r (20X)| |ADD M |86|*****| 7|Add to Memory |A=A+[HL] | |ADI n |C6|*****| 7|Add Immediate |A=A+n | |ANA r |A7|****0| 4|AND Accumulator |A=A&r (24X)| |ANA M |A6|****0| 7|AND Accumulator and Memory|A=A&[HL] | |ANI n |E6|00| 7|AND Immediate |A=A&n | |CALL a |CD|-----|18|Call unconditional |-[SP]=PC,PC=a| |CC a |DC|-----| 9|Call on Carry |If CY=1(18~s)| |CM a |FC|-----| 9|Call on Minus |If S=1 (18~s)| |CMA |2F|-----| 4|Complement Accumulator |A=~A | |CMC |3F|----| 4|Complement Carry |CY=~CY | |CMP r |BF|*****| 4|Compare |A-r (27X)| |CMP M |BF|*****| 7|Compare with Memory |A-[HL] | |CNC a |D4|-----| 9|Call on No Carry |If CY=0(18~s)| |CNZ a |C4|-----| 9|Call on No Zero |If Z=0 (18~s)| |CP a |F4|-----| 9|Call on Plus |If S=0 (18~s)| |CPE a |EC|-----| 9|Call on Parity Even |If P=1 (18~s)| |CPI n |FE|*****| 7|Compare Immediate |A-n | |CPO a |E4|-----| 9|Call on Parity Odd |If P=0 (18~s)| |CZ a |CC|-----| 9|Call on Zero |If Z=1 (18~s)| |DAA |27|*****| 4|Decimal Adjust Accumulator|A=BCD format | |DAD B |09|----|10|Double Add BC to HL |HL=HL+BC | |DAD D |19|----|10|Double Add DE to HL |HL=HL+DE | |DAD H |29|----|10|Double Add HL to HL |HL=HL+HL | |DAD SP |39|----|10|Double Add SP to HL |HL=HL+SP | |DCR r |3D|****-| 4|Decrement |r=r-1 (0X5)| |DCR M |35|****-|10|Decrement Memory |[HL]=[HL]-1 | |DCX B |0B|-----| 6|Decrement BC |BC=BC-1 | |DCX D |1B|-----| 6|Decrement DE |DE=DE-1 | |DCX H |2B|-----| 6|Decrement HL |HL=HL-1 | |DCX SP |3B|-----| 6|Decrement Stack Pointer |SP=SP-1 | |DI |F3|-----| 4|Disable Interrupts | | |EI |FB|-----| 4|Enable Interrupts | | |HLT |76|-----| 5|Halt | | |IN p |DB|-----|10|Input |A=[p] | |INR r |3C|****-| 4|Increment |r=r+1 (0X4)| |INR M |3C|****-|10|Increment Memory |[HL]=[HL]+1 | |INX B |03|-----| 6|Increment BC |BC=BC+1 | |INX D |13|-----| 6|Increment DE |DE=DE+1 | |INX H |23|-----| 6|Increment HL |HL=HL+1 | |INX SP |33|-----| 6|Increment Stack Pointer |SP=SP+1 | |JMP a |C3|-----| 7|Jump unconditional |PC=a | |JC a |DA|-----| 7|Jump on Carry |If CY=1(10~s)| |JM a |FA|-----| 7|Jump on Minus |If S=1 (10~s)| |JNC a |D2|-----| 7|Jump on No Carry |If CY=0(10~s)| |JNZ a |C2|-----| 7|Jump on No Zero |If Z=0 (10~s)| |JP a |F2|-----| 7|Jump on Plus |If S=0 (10~s)|

|SIM |30|-----| 4|Set Interrupt Mask |mask=A | |SPHL |F9|-----| 6|Move HL to SP |SP=HL | |STA a |32|-----|13|Store Accumulator |[a]=A | |STAX B |02|-----| 7|Store Accumulator indirect|[BC]=A | |STAX D |12|-----| 7|Store Accumulator indirect|[DE]=A | |STC |37|----1| 4|Set Carry |CY=1 | |SUB r |97|*****| 4|Subtract |A=A-r (22X)| |SUB M |96|*****| 7|Subtract Memory |A=A-[HL] | |SUI n |D6|*****| 7|Subtract Immediate |A=A-n | |XCHG |EB|-----| 4|Exchange HL with DE |HL<->DE | |XRA r |AF|00| 4|Exclusive OR Accumulator |A=Axr (25X)| |XRA M |AE|00| 7|Exclusive OR Accumulator |A=Ax[HL] | |XRI n |EE|00| 7|Exclusive OR Immediate |A=Axn | |XTHL |E3|-----|16|Exchange stack Top with HL|[SP]<->HL | |------------+-----+--+----------------------------------------| | PSW |-01 | |Flag unaffected/affected/reset/set | | S |S | |Sign (Bit 7) | | Z | Z | |Zero (Bit 6) | | AC | A | |Auxilary Carry (Bit 4) | | P | P | |Parity (Bit 2) | | CY | C| |Carry (Bit 0) | |---------------------+----------------------------------------| | a p |Direct addressing | | M z |Register indirect addressing | | n nn |Immediate addressing | | r |Register addressing | |---------------------+----------------------------------------| |DB n(,n) |Define Byte(s) | |DB 'string' |Define Byte ASCII character string | |DS nn |Define Storage Block | |DW nn(,nn) |Define Word(s) | |---------------------+----------------------------------------| | A B C D E H L |Registers (8-bit) | | BC DE HL |Register pairs (16-bit) | | PC |Program Counter register (16-bit) | | PSW |Processor Status Word (8-bit) | | SP |Stack Pointer register (16-bit) | |---------------------+----------------------------------------| | a nn |16-bit address/data (0 to 65535) | | n p |8-bit data/port (0 to 255) | | r |Register (X=B,C,D,E,H,L,M,A) | | z |Vector (X=0H,8H,10H,18H,20H,28H,30H,38H)| |---------------------+----------------------------------------| | + - |Arithmetic addition/subtraction | | & ~ |Logical AND/NOT | | v x |Logical inclusive/exclusive OR | | <- -> |Rotate left/right | | <-> |Exchange | | [ ] |Indirect addressing | | [ ]+ -[ ] |Indirect address auto-inc/decrement | | { } |Combination operands | | ( X ) |Octal op code where X is a 3-bit code | | If ( ~s) |Number of cycles if condition true |

Experiment No:

8-BIT ADDITION USING ACCUMULATOR

AIM: To perform 8-bit Addition of two hexadecimal numbers using

accumulator in 8085

PROGRAM:

Address Program Explanation

LDA 9000 Load contents of address 9000 (Input 1) into the

accumulator

MOV B,A Shift contents of accumulator to register B

LDA 9001 Load contents of address 9001(Input 2) into the accumulator

ADD B Add data in B to accumulator & store in the accumulator

STA 9002 Store the (Result) contents of accumulator to address 9002

JC Loc1 Jump to Loc1 if carry is 1

MVI A,00 Store value 00 in accumulator

STA 9003 Store the (Carry) contents of accumulator to address 9003

HLT End of Program

Loc 1: MVI A,01 Store value 01 in accumulator

STA 9003 Store the (Carry) contents of accumulator to address 9003

HLT End of Program

MNEMONICS:

ADDRESS OPCODE OPERAND LOCATION COMMAND

8000 3A 00 90 LDA 9000

8003 47 MOV B,A

8004 3A 01 90 LDA 9001

8007 80 ADD B

8008 32 02 90 STA 9002

800B DA 14 80 JC Loc

800E 3E 00 MVI A,

8010 32 03 90 STA 9003

8013 76 HLT

8014 3E 01 Loc 1 MVI A,

8016 32 03 90 STA 9003

8019 76 HLT

INPUT & OUTPUT:

Location Values

9000 INPUT 1 42

9001 INPUT 2 35

9002 RESULT 77

9003 CARRY 00

Location Values

9000 INPUT 1 A

9001 INPUT 2 F

9002 RESULT 9E

9003 CARRY 01

Date:

Experiment No:

8-BIT ADDITION WITH MEMORY POINTER

AIM: To perform 8-bit Addition of two hexadecimal numbers using

memory pointer in 8085

PROGRAM:

Address Program Explanation

LXI H, 8201 Setting pointer for getting data

MVI C, 00 Clearing register C for carry

MOV A, M Getting Data 1 into the accumulator from memory

INX H Increment pointer to the next memory location

ADD M Add second data to Accumulator and store it in

accumulator

JNC Ahead If carry is '0' , go to location 'Ahead'

INR C If carry is '1' , Increment register C to 1

Ahead INX H Increment pointer to the next memory location

MOV M,A Store Sum in memory

INX H Increment pointer to the next memory location

MOV M,C Store Carry in memory

HLT End of Program

FLOWCHART

Microprocessor & Microcontroller Lab Manual: 8085, 8086, and 8051, Summaries of Microprocessors

Related documents

Partial preview of the text

Download Microprocessor & Microcontroller Lab Manual: 8085, 8086, and 8051 and more Summaries Microprocessors in PDF only on Docsity!

LABORATORY MANUAL

PROGRAMME: B.Tech

SEMESTER /YEAR : 3

year 5

Semester

SUBJECT CODE: BM

SUBJECT NAME: Microprocessor & Microcontroller Lab

Prepared By:

Name: A Bhargavi Haripriya

Designation: Assistant Professor (OG)

DEPARTMENT OF BIOMEDICAL ENGINEERING

SCHOOL OF BIOENGINEERING,

FACULTY OF ENGINEERING & TECHNOLOGY

SRM UNIVERSITY

(UNDER SECTION 3 of UGC ACT 1956)

KATTANKULATHUR-

Tamil Nadu, India

| _________ _________ |

| | _/ |_ |

Instructions can be categorized according to their method of addressing the

hardware registers and/or memory.

Implied Addressing:

The addressing mode of certain instructions is implied by the instruction’s

function. For example, the STC (set carry flag) instruction deals only with the

carry flag, the DAA (decimal adjust accumulator) instruction deals with the

accumulator.

Register Addressing:

Quite a large set of instructions call for register addressing. With these instructions,

you must specify one of the registers A through E, H or L as well as the operation

code. With these instructions, the accumulator is implied as a second operand. For

example, the instruction CMP E may be interpreted as 'compare the contents of the

E register with the contents of the accumulator.

Immediate Addressing:

Instructions that use immediate addressing have data assembled as a part of the

instruction itself. For example, the instruction CPI 'C' may be interpreted as

‘compare the contents of the accumulator with the letter C. When assembled, this

instruction has the hexadecimal value FE43. Hexadecimal 43 is the internal

representation for the letter C. When this instruction is executed, the processor

fetches the first instruction byte and determines that it must fetch one more byte.

The processor fetches the next byte into one of its internal registers and then

performs the compare operation.

Direct Addressing:

Jump instructions include a 16-bit address as part of the instruction. For example,

the instruction JMP 1000H causes a jump to the hexadecimal address 1000 by

replacing the current contents of the program counter with the new value 1000H.

Instructions that include a direct address require three bytes of storage: one for the

instruction code, and two for the 16-bit address

Instruction Naming Conventions:

The mnemonics assigned to the instructions are designed to indicate the function of

the instruction. The instructions fall into the following functional categories:

Data Transfer Group:

The data transfer instructions move data between registers or between memory and

registers.

MOV Move

MVI Move Immediate

LDA Load Accumulator Directly from Memory

STA Store Accumulator Directly in Memory

LHLD Load H & L Registers Directly from Memory

SHLD Store H & L Registers Directly in Memory

An 'X' in the name of a data transfer instruction implies that it deals with a register

pair (16-bits);

LXI Load Register Pair with Immediate data

LDAX Load Accumulator from Address in Register Pair

STAX Store Accumulator in Address in Register Pair

XCHG Exchange H & L with D & E

XTHL Exchange Top of Stack with H & L

Arithmetic Group :

The arithmetic instructions add, subtract, increment, or decrement data in registers

or memory.

ADD Add to Accumulator

ADI Add Immediate Data to Accumulator

ADC Add to Accumulator Using Carry Flag

ACI Add Immediate data to Accumulator Using Carry

SUB Subtract from Accumulator

SUI Subtract Immediate Data from Accumulator

SBB Subtract from Accumulator Using Borrow (Carry) Flag

| _ _ |