Topics
•Microprocessor support circuits
–Clock and reset generation
–Power control
–Microprocessor supervisors
•I/O subsystems
–GPIO pin construction
–I/O port design
–I/O decoding
–I/O synchronization
–ADuC7026 GPIO
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Microcontroller I/O and Clocking: A Deep Dive into ADuC7026, Lecture notes of Computer Science
An in-depth exploration of various topics related to microcontroller i/o and clocking, with a focus on the aduc7026 microcontroller. Topics covered include clock generation, power control, reset generation, i/o subsystems, gpio pins, i/o port design, i/o decoding, i/o synchronization, and more. Students will gain valuable insights into the inner workings of microcontroller systems and the practical applications of these concepts.
Typology: Lecture notes
2012/2013
1 / 35
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Topics
- Microprocessor support circuits
- Clock and reset generation
- Power control
- Microprocessor supervisors
- I/O subsystems
- GPIO pin construction
- I/O port design
- I/O decoding
- I/O synchronization
- ADuC7026 GPIO
ADuC7026 Block Diagram
Reset
- The reset signal is used to force the processor
into a known state from which operation can
reliably be started.
- On power up, the reset signal should be
asserted long enough to ensure that the
supply voltages are stable and the oscillator is
running and stable
- Reset Generation
- So, how do we generate a reliable reset signal? ADuC Docsity.com^ pin-out
Reset Generation
- RC reset circuit operation
- Shortcomings
ADuC Docsity.com^ pin-out
Basic System Bus Operation
- Address
- Unidirectional from CPU
- Data
- Bidirectional
- Control
- /RS or /RD – output from CPU
- Indicates a read operation in progress
- /WS or /WR – output from CPU
- Indicates a write operation in progress
- /WAIT or /READY – input to CPU
- Used by external device to signal that it is not able to complete transfer yet Docsity.com
- /RS or /RD – output from CPU
I/O Port Basics
- I/O subsystems allow the CPU to interact with
the outside world
- Basic GPIO pin requirements
- Configurable as input or output
- Can set value driven out on the pin
- Can read the current value on the pin
- Configurable vs. multiplexed pins
- Unconditional I/O
- The I/O device can accept or return data without delay
ADuC Docsity.com^ pin-out
μP Compatible I/O Devices
- Complex I/O devices typically require more sophisticated interface and control logic
- μP compatible I/O devices have the necessary logic built in to the device itself - Interface designed to be reasonably compatible with many microprocessor buses - Need to add decoding/selection logic - Example
- Device controllers
- An organizational model commonly used to interface to complex I/O devices (serial ports, LCDs, disk drives, etc.)
- Generic model
- Example – Hitachi HD44780U LCD Controller
I/O Address Decoding
- I/O address decoding determines the
logical location of the I/O device
- Isolated I/O
- Memory-mapped I/O
- Input vs. output ports
- Same address does not guarantee same function!
- Exhaustive address decoding
- Partial address decoding
Conditional I/O
- Conditional vs. unconditional transfers
- I/O synchronization
- Hardware example
- Polling
- Overhead
- Flags / semaphores
- Wait loops
- Timeouts
- Software exercise
ADuC GPIO Ports
- The ADuC7026 has 40 pins organized as 5 ports that can be used as digital GPIO - All pins have multiple functions in addition being able to be used as GPIO - The configuration selection is set through the GPxCON MMR.
ADuC7026 GPIO MMRs (cont)
- GPxPAR
- PAR ameters
- Controls whether or not the internal pull-ups are used.
- Does not apply to ports 2 and 4
ADuC7026 GPIO MMRs (cont)
- GPxDAT
- Control the pin direction
- Set the output state
- Read the pin value
- Read the pin values that were present at reset
ADuC7026 GPIO MMRs (cont)
- GPxCLR
- Write 1s to clear the output value
- 0s have no effect
Wrapping Up
- Homework #4 will be due on Wednesday,
March 21
- Quiz #2 will be held on Thursday, March 29 at
7:15pm in 2255EH
- Reading for next week
- Chapter 10
- ADUC 53-60, 71-73, 75-