Multiprocessors Cache Coherence Protocols-Parallel Processing-Lecture Slides, Slides of Parallel Computing and Programming

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Multiprocessors Cache

Coherence protocols

MESI PROTOCOL •^

Pentium processor

•^

Snoopy

•^

Write Invalidate

•^

Write Back

•^

Snoopy based protocols

-^

Directory based protocols

Snoopy Cache Systems

How are invalidates sent to the right processors?In snoopy caches, there is a broadcast media that listens to all invalidates andread requests and performs appropriate coherence operations locally.

A simple snoopy bus based cache coherence system. Tags

Snoop H/W

Processor Cache

Tags

Snoop H/W

Processor Cache

Tags

Snoop H/W

Processor Cache

DirtyAddress/data

Memory

MESI protocol of Pentium Processor

MESI State Diagrams

•^

Initiating processor perspective

-^

Other processors perspective

Caused by other PEs cache controller snooping Activity on the bus

Read Hit

Write Miss

Example:

MESI protocol WorkingStep-by-step operations

Directory Based Systems

Architecture of typical directory based systems: (a) a centralized directory (b) a distributed directory.

(a)

(b)

Directory

Data

State

Presence

Bits

ProcessorCache ProcessorCache

ProcessorCache

ProcessorCache

Interconnection Network

Interconnection Network

Memory

Presence

bits / State

ProcessorCache Memory

Presence

bits / State

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Performance of

Directory Based Schemes

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The need for a broadcast media is replaced by the directory.

-^

The additional bits to store the directory may add significantoverhead.

-^

The underlying network must be able to carry all the coherencerequests.

-^

The directory is a point of contention, therefore, distributeddirectory schemes must be used.

-^

Quantify the memory required for the Directory

-^

techniques for efficient directory implementation