ECE 452: Computer Organization
and Architecture
- ECE251
Pre-requisites:
Microprocessors
Addressing Modes
Assembly Language
Memory and I/O
- Understands basic microprocessor memory and I/O system
organization
- Understands basic structure of a microprocessor
- Understands different addressing modes for operands in
instructions
- Able to program in assembly language
- Can analyze I/O system performance
- Can design to latency and bandwidth
constraints
- Can determine effective memory access
latencies under a hierarchical memory system
- Can exploit instruction level parallelism with
pipelining to accelerate executions; plus basic
hazards handling and branch prediction techniques
- Can design control paths using hardwired logic
or microprogramming
- Can design simple datapaths for common
instructions
- Can evaluate logic level hardware
characteristics that would affect system
performance
I/O
Memory
Parallelism and Pipelining
Control Paths
Datapaths
Logic-level Hardware
Concepts:
- Overview of computer organization
- Hardware technology: CMOS, clock, timing
- Microarchitecture design for supporting the instruction
set architecture (datapath, control path)
- Pipelined processor design
Basic solutions for handling data, structural,
and control hazards
Basic branch prediction techniques
- Memory System
Memory hierarchy
Cache memory design and performance
Secondary memory
Virtual memory: paging, swapping
- I/O Systems
I/O organization
Bus systems (e.g., PCI)
Applications:
- Case studies of processor core architecture
Tools:
P.O.C.: Ricky Kwok
IN
OUT
As of 12/9/08
