Address Binding and Memory Management Techniques: A Comparative Analysis, Exercises of Operating Systems

An in-depth explanation of address binding, its stages, and compares various memory management techniques such as paging and swapping, logical and physical address spaces, internal and external fragmentation, and two-level and three-level paging schemes.

Typology: Exercises

2021/2022

Uploaded on 10/09/2022

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Q1. Explain in brief about address binding and its stages?
Address binding is the process of mapping from one address space to another address space.
Logical address is an address generated by the CPU during execution, whereas Physical Address
refers to the location in the memory unit (the one that is loaded into memory). The logical
address undergoes translation by the MMU or address translation unit in particular. The output
of this process is the appropriate physical address or the location of code/data in RAM.
Three stages of address binding =
Binding in compile time
If physical memory addresses known a priori, absolute code can be generated, must recompile
code if starting address changes.
Loading the executable as a process in memory is very fast.
Binding in load time
Must generate relocatable code if physical address is not known during compile time.
The loader translates the relocatable address to an absolute address.
The base address of the process in main memory is added to all logical addresses by the loader
to generate an absolute address. In this, if the base address of the process changes, then we
need to reload the process again.
Binding in execution time
Binding delayed until run time if the process can be moved during its execution from one
memory segment to another. Need hardware support for address maps. (eg:- base and limit
registers)
Q2. Differences between;
a) Paging v/s Swapping
Paging Swapping
It is a technique of memory allocation. It is procedure of copying out the entire process.
Paging occurs when some part of process is
transferred to disk.
Swapping occurs when whole process is
transferred to disk.
In this the contiguous block of memory is made
non-contiguous but of fixed size called frame or
In this process is swapped temporarily from main
memory to secondary memory.
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Q1. Explain in brief about address binding and its stages?

 Address binding is the process of mapping from one address space to another address space. Logical address is an address generated by the CPU during execution, whereas Physical Address refers to the location in the memory unit (the one that is loaded into memory). The logical address undergoes translation by the MMU or address translation unit in particular. The output of this process is the appropriate physical address or the location of code/data in RAM. Three stages of address binding = Binding in compile time  If physical memory addresses known a priori, absolute code can be generated, must recompile code if starting address changes.  Loading the executable as a process in memory is very fast. Binding in load time  Must generate relocatable code if physical address is not known during compile time.  The loader translates the relocatable address to an absolute address.  The base address of the process in main memory is added to all logical addresses by the loader to generate an absolute address. In this, if the base address of the process changes, then we need to reload the process again. Binding in execution time  Binding delayed until run time if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps. (eg:- base and limit registers)

Q2. Differences between;

a) Paging v/s Swapping

Paging Swapping It is a technique of memory allocation. It is procedure of copying out the entire process. Paging occurs when some part of process is transferred to disk. Swapping occurs when whole process is transferred to disk. In this the contiguous block of memory is made non-contiguous but of fixed size called frame or In this process is swapped temporarily from main memory to secondary memory.

pages. Swapping is done by inactive processes. Only active process can perform paging.

b) Logical address space v/s Physical address space

Logical address space Physical address space User can view the logical address of a program. User can never view physical address of program. Generated by the CPU and also referred to as virtual address. Address seen by the memory unit. Speed in execution time. Slow in execution time. The user can use the logical address to access the physical address. The user can indirectly access physical address but not directly.

c) Internal Fragmentation v/s External Fragmentation

Internal Fragmentation External Fragmentation Allocated memory may be slightly larger that requested memory, this size difference is memory internal to a partition, but not being used. Total memory space exists to satisfy a request, but it is not contiguous. The solution of internal fragmentation is best-fit block. Solution of external fragmentation is compaction, paging and segmentation. Internal fragmentation occurs when memory is divided into fixed sized partitions. External fragmentation occurs when memory is divided into variable size partitions based on the size of processes. The difference between memory allocated and required space or memory is called Internal fragmentation. The unused spaces formed between non- contiguous memory fragments are too small to serve a new process, is called External fragmentation.

d) Two-level Paging scheme v/s Three-level Paging scheme

Two-level Paging scheme :  A logical address (on 32-bit machine with 1K page size) is divided into: – a page number consisting of 22 bits – a page offset consisting of 10 bits.  Since the page table is paged, the page number is further divided into: – a 12-bit page number – a 10-bit page offset.