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A comprehensive overview of the plesiochronous digital hierarchy (pdh) technology used in telecommunication networks. It explains the concept of plesiochronous operation, the different classes of pdh systems, and the frame structure of pdh 8 mbps, 34 mbps, and 140 mbps. It also discusses the advantages and disadvantages of pdh, and provides definitions of key terms related to the technology.
Typology: Slides
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Plesiochronous Two signals are Plesiochronous if their corresponding significant instants occur at nominally the same rate (e.g. 2048 kbit/s), any variation in rate being constrained within specified limits (e.g. 5 x 10
The exact data rate of the 2 Mbit/s data stream is controlled by a clock in the equipment generating the data. The exact rate is allowed to vary some percentage (+/- 50 ppm) either side of an exact 2.048 Mbit/s. This means that different 2 Mbit/s data streams can be (probably are) running at slightly different rates to one another.
Because each of the four 2 Mbit/s data streams is not necessarily running at the same rate, some compensation has to be made. The transmitting multiplexer combines the four data streams assuming that they are running at their maximum allowed rate. This means that occasionally, (unless the 2 Mbit/s really is running at the maximum rate) the multiplexer will look for the next bit but it will not have arrived. In this case, the multiplexer signals to the receiving multiplexer that a bit is "missing". This allows the receiving multiplexer to correctly reconstruct the original data for each of the four 2 Mbit/s data streams, and at the correct, different plesiochronous, rates. The resulting data stream from the above process runs at 8.448 Mbit/s (about 8 Mbit/s). Similar techniques are used to combine four x 8 Mbit/s together, giving 34 Mbit/s. Four x 34 Mbit/s, gives 140. Four x 140 gives 565.
There are three main classes of this system: 1 – North American, 2 – Japanese, & 3 – European The basic data transfer rate for North American and Japanese Systems is a data stream of 1.544 Mbps, called T1, while that for European System is a data stream of 2.048 Mbps, called E1. For speech transmission, E1 is broken down into 30 x 64 kbit/s channels, called E0, plus 2 x 64 kbit/s channels used for signalling and synchronisation. Alternatively, the whole 2 Mbit/s may be used for non speech purposes, for example, data transmission.
PDH System -A Higher Order PCM System A difference between 2 Mbps PCM system and PDH is that the PDH system transmits one bit rather than eight bits at a time from the lower order (64 kbps etc) systems. This is called bit interleaving. The higher order system consists of four lower order systems called Tributaries (64 kbps, 2 Mbps etc). To make PDH receiver synchronized to the bit-stream, a Frame Alignment Signal is added to the bit-stream It is also necessary to compensate for bit-rate deviation from nominal in the tributaries. To compensate for this bit-rate deviation from nominal, a justification bit can be inserted if the frequency is too low and removed, if the frequency is too high. This bit is called Justification Bit.
PDH 8 Mbps Frame Structure Frame Alignment Signal = 1111010000 AI = Alarm Indicator BIT12 = Spare Bit for National Use T1, T2, T3, T4 = Bits from Tributaries 1, 2,3, & 4 respectively JB1, JB2, JB3, JB4 = Justification Bits for Tributaries 1, 2,3, & 4 respectively JC1, JC2, JC3, JC4 = Justification Control Bits for Tributaries 1, 2,3, & 4 respectively
PDH 8 Mbps ITU-T Recommendation for PDH 8 Mbps: G. Frame Repetition Rate: 125 us No. of Bits per Frame: 848 No. of Sets per Frame: 4 No. of Bits per Set of Frame: 212 106
PDH 140 Mbps Frame Alignment Signal = 111110100000 AI = Alarm Indicator BIT14, BIT15, BIT16 = Spare Bits for National Use T1, T2, T3, T4 = Bits from Tributaries 1, 2,3, & 4 respectively JB1, JB2, JB3, JB4 = Justification Bits for Tributaries 1, 2,3, & 4 respectively JC1, JC2, JC3, JC4 = Justification Control Bits for Tributaries 1, 2,3, & 4 respectively
Access to tributaries in PDH Systems No ADD/DROP Multiplexing Manual Hard-Wired Cross-Connections at the DDFs
REG SECTIONS PATH MULTIPLEX SECTION
Network Elements