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EEL 4746 (Microprocessor-Based Systems Design), Fall 2004
EXAM #1 ā Sample Questions
The questions below are representative of general types of problems that you might
encounter on the real exam. This is not intended to be limiting ā other problems could
appear that are substantially different from those shown here. Past homework and quiz
questions are additional sources for types of problems that could appear on the exam.
To practice for the exam, you should try solving these problems, and time how
long it takes you. The real exam will contain roughly 10 questions at varying levels of
difficulty. (If you can complete the below problems in 2 hours or less, you will be in
good shape.) The exam will be open book and open notes, and you should bring a
calculator.
- Draw a generic high-level block diagram of a basic computer system, including
CPU, Memory, I/O system, and Bus.
For this, you could basically just copy down the diagram on
slide 35 of the slide set ā01_course_introduction.pptā, or
(slightly more detailed) the diagram in figure 1-1 on p.2 of
the book.
- Draw a state-transition diagram for a Moore machine having one input signal
called dir , and an output signal called count which is a 3-bit binary number
c 2
c 1
c 0
, which does the following: It starts in a state where count =0. When dir is
1, count counts upwards up to 5 in binary and stops there. When dir is 0, count
counts downwards to 0 and stops there.
There are lots of valid ways to draw this. Hereās one:
c
2
c
1
c
0
c
2
c
1
c
0
c
2
c
1
c
0
c
2
c
1
c
0
c
2
c
1
c
0
c
2
c
1
c
0
start
dir = 1 dir = 1
dir = 1
dir = 1 dir = 1
dir = 1
dir = 0 dir = 0
dir = 0
dir = 0 dir = 0
dir = 0
s
0
s
1
s
2
s
3
s
4
s
5
- Write an HC11 assembly code fragment that implements the finite-state machine
of the previous problem. Assume that the symbol ādirā has been defined as the
address of an input port whose low-order bit represents the dir input of the
previous problem, and that the symbol ācountā has been defined as the address
of an output port whose low 3 bits represent the count output. Use the A
accumulator to store the current state.
If we assume the other bits of the dir and count port (not
mentioned) should just always be zero, this can be done easily:
start: CLRA ; Set the current state to S0.
output: STAA count ; Output current state # as count.
loop: TST dir ; Test the "dir" input
BEQ down ; Go down if dir=
up: CMPA #5 ; Already 5?
BEQ loop ; If so, no change.
INCA ; Increment state number.
BRA output ; Update output and repeat.
down: TST count ; Check current count
BEQ loop ; If count=0, keep it.
DECA ; Decrement state number.
BRA output ; Update output and repeat.
Try running this code under THRSIM11 with dir EQU $1003 and
count EQU $1004, and use the I/O box to toggle the PC0 input
and observe the PB0-2 outputs. You may want to add a delay
loop so it doesnāt go too fast to see.
Partial credit would be given for a pseudocode solution.
If we assume instead that the other bits in dir and count
ports must be ignored and remain undisturbed, the solution
becomes quite a bit longer.
- How many bits are there in a kilobyte? Give the exact number.
When people use ākilobyteā in computer engineering, they
usually mean a kibibyte, which is 2
10
bytes, or 1,024 bytes.
There are 8 bits in a byte, so there are 8Ć1,024 = 8,
bits in a kilobyte.
- Convert the number 1, 10
from decimal to binary, then from binary to octal,
from binary to hexadecimal, and finally convert the hexadecimal code directly
back to decimal (without going through binary). Show your work.
Weāll convert to binary by repeatedly subtracting the
largest power of 2 less than the given number, to find
where all the 1 bits are.
Yes, because: (Any of the following explanations would be
acceptable.)
ļ· The result of the signed subtraction is wrong.
ļ· We took a negative minus a positive and got a positive.
ļ· A
7
=1, B
7
=0, but R 7
=0, so
( ) ( )
7 7 7 7 7 7
V ļ½ A ļ B ļ R ļ« A ļ B ļ R
evaluates to true, due to the left-hand clause
7 7 7
A ļ B ļ R
of the OR = 1.
ļ· There was a borrow into bit 7, but not out of bit 7.
- Which of the following branches would be taken immediately following the
subtraction in problem 7? Circle all the ones that would be taken. BRA, BEQ,
BNE, BGT, BGE, BLT, BLE, BLO, BLS, BHI, BHS, BPL, BMI, BCS, BCC,
BVS, BVC.
BRA is taken because it is always taken.
BEQ is not taken because the subtraction result wasnāt 0.
BNE is taken because the subtraction result was ā 0.
BGT is not taken because -76 isnāt greater than 77.
BGE isnāt taken because -76 isnāt ļ³ 77
BLT is taken because -76 < 77. (Note N=0 & V=1, so
Nļ
V=1.)
BLE is taken because -76 ļ£ 77.
BLO is not taken because 180 is not lower than 77. (Note
C=0.)
BLS isnāt taken because 180 isnāt ļ£77.
BHI is taken because 180 > 77. (And C=0; no borrow fr.
bit 7.)
BHS is taken because 180 ļ³ 77.
BPL is taken because the result 103 ļ³ 0. (N bit is 0.)
BMI is not taken because 103 isnāt < 0. (N bit isnāt 1.)
BCS is not taken because C=0. (No borrow out of bit 7.)
BCC is taken, because the carry bit C is clear (0).
BVS is taken because the overflow bit V is set (1).
BVC is not taken because V isnāt clear (0).
- In the HC11, is it possible for accumulator A to contain the number 300? Why or
why not?
No, because accumulator A is an 8-bit register and so (in
standard number representations) it could only ever
contain numbers ranging from -128 (signed $80) to +
(unsigned $FF). [One could always invoke some other non-
standard number system, but that is not the intent of this
question.]
- In the HC11, is it possible for accumulator A to contain the number $3F at the
same moment that accumulator D contains the number $403F? Why or why not?
No, because A is the high-order byte of D. Thus if
D=$403F, then A=$40, not $3F.
- The ātopā of the stack is generally at a higher-numbered/lower-numbered (circle
one) memory address than the ābottomā of the stack.
The top of the stack is at a lower-numbered address,
unless the stack is empty, in which case the ātopā and
ābottomā are the same location.
- If A=$3F, SP=$7FFF, and we do PSHA, then (a) what will SP be afterwards, and
(b) what memory location will contain $3F?
SP will be $7FFE, and MEM[$7FFF] = $3F.
- If register X contains $1004, and accumulator B contains $36, then the instruction
sequence PSHX, PSHB, PULX, PULB will result in what values in X and B?
After PSHX, the stack will contain (top to bottom) ($10,
After PSHB, the stack will contain ($36, $10, $04).
After PULX, X will contain $3610; stack will be ($04).
After PULB, B will contain $04; stack will be ( ).
- If you wanted a program to remain in memory after the power is turned off, would
you store it in DRAM or EEPROM?
EEPROM, since this is non-volatile. DRAM is volatile.
- In the default HC11E9 memory map, what range of addresses is reserved for the
control registers?
If you forgot, you could look this up in the textbook (table
2-2, pp. 9-10), the lecture slides (slide set 04, slides 23-24),
the programming reference guide, or other references.
The address range is $1000:103F.
- Suppose you wanted to write a subroutine to copy data from one region of
memory to another using a loop. What addressing mode would you use in the
load and store instructions inside the loop? Explain your choice.
Register indirect addressing mode (a form of indexed
addressing) would be preferred here, because it allows the
identity of the location accessed to be different each time
through the loop.
- Write the subroutine alluded to in the previous question. Assume that initially X
contains the address of the start of the source region to be copied from, Y contains
the address of the destination region to be copied to, and D contains the number of
bytes to copy.
(subroutineās body here)
PULX_
RTS
