CMSC 411 Practice Exam 2
General instructions.
Be complete, yet concise. You may leave arithmetic expressions in any form that a calculator could evaluate.
1. Cache
(a) Suppose we have a byte addressable memory of size 4GB(232 bytes) with a cache of size 256KB
(218 bytes), not including tag bits. Also suppose the cache block size is 32 bytes. For each of
the following cache organizations, compute the length in number of bits for the tag, index and
offset fields of the 32-bit memory address (show your calculations):
i. direct mapped
ii. 2-way set associative
iii. 8-way set associative
iv. fully associative
(b) Given the following parameters, which performs better in terms of average memory access time,
the direct mapped or the 2-way set associative cache? Assume a cache hit takes 1 cycle for either
organization, and the cache miss penalty is 20 nanoseconds (both use the same memory system).
Justify your answer.
Direct mapped - miss rate 10%, 1GHz clock
2-way set associative - miss rate 5%, 800MHz clock
(c) Consider adding a fast second-level cache to a computer with only a single level cache. Suppose
data can be accessed from the second level cache 12 times faster than it can be accessed from
the original cache, and that the second level cache can be used 30% of the time. How much
speedup can we gain by adding the second-level cache? Assume all data accesses hit in the
original cache.
