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EE 231
Homework 11 Due November 12, 2008
- Problem 6.
When the count goes from 1111111111 2 to 0000000000 2 the clock has to propagate through all ten flip-flops, so there is a 30 ns delay. This is the shortest period the clock could reliably operate with, so the maximum frequency is 1/30 ns = 33.3 MHz.
- Problem 6.25.
(a) Make a 6-bit ring counter which will reset with one FF set, and the others reset:
Clock
P
R
D Q P
R
D Q P
R
D Q P
R
D Q P
R
D Q P
R
D Q^ T0^ T1^ T2^ T3^ T4^ T
Reset
(b) We need a counter which counts through 6 states. This requires (at least) three flip-flops. You could use a counter like the one shown in Figure 6.15 of the text, or a counter like the one below, which counts from 0 to 5, then asynchronously resets to 0 when the count reaches 6:
Y
Y
Y
Y
Y
Y
Y A0 Y
A
A
C
C
Clock C
Reset
T
T
T
T
T
T
3−to−8 Decoder
Counter
3−Bit
Asynchronous
If the counter uses a synchronous reset, the counter should be reset when the count is 5:
Y
Y
Y
Y
Y
Y
Y A0 Y
A
A
C
C
Clock C
Reset
T
T
T
T
T
T
3−to−8 Decoder
Counter
3−Bit
Synchronous
- Problem 6.
A behavioral description describes how the system will function, not the underlying gates, so it is not necessary to specify such things as flip-flop type or how the flip-flops and combinational circuits are wired. Here is one way to do it, with the unused states taken into account by a default case in the case statement:
- Problem 6.45. Implement a counter which repeats the sequence 0, 1, 3, 7,
- 6, 4. */ module p6_45(input clock, output [2:0] out);
reg [2:0] state;
parameter s0 = 3’d0, s1 = 3’d1, s3 = 3’d3, s4 = 3’d4, s6 = 3’d6, s7 = 3’d7;
always @(posedge clock) case (state) s0: state <= s1; s1: state <= s3; s3: state <= s7; s7: state <= s6; s6: state <= s4; default: state <= s0; endcase
assign out = state;
endmodule
- Problem 7.
(a) 8K × 16: 2^13 = 8 K, so need 13 address lines and 16 data lines. (b) 2G × 8: 2^31 = 2 G, so need 31 address lines and 8 data lines. (c) 16M × 32: 2^24 = 16 M, so need 24 address lines and 32 data lines. (d) 256K × 64: 2^18 = 256 K, so need 18 address lines and 64 data lines.
- Problem 7.
(a) 8K words, each word is 2 bytes, so 2 × 8K = 16KB. (b) 2G words, each word is 1 byte, so 1 × 2G = 2GB. (c) 16M words, each word is 4 bytes, so 4 × 16M = 64MB. (d) 256K words, each word is 8 bytes, so 8 × 256K = 2MB.
- Problem 7.
(a) 256K/(32K per chip) = 8 chips (b) 2^18 = 256K, so need 18 address lines. 215 = 32K, so chips have lower 15 address bits in common. (c) The 3 high-order address bits are used to select the 8 chips, so you need a 3-to-8 decoder.
- Problem 7.
13 address lines go into the chip. 13 address lines go to the row decoder and 12 to the column decoder. This gives 2^13 × 212 = 2^25 = 32M locations.
- Problem 7.
For 11 data bits, need 4 parity bits (Table 7.2 of the text). Arrange the parity and data bits as shown below:
P 1 P 2 D 3 P 4 D 5 D 6 D 7 P 8 D 9 D 10 D 11 D 12 D 13 D 14 D 15 X X 1 X 1 0 0 X 1 0 0 1 0 1 0
P 1 = XOR(D 3 , D 5 , D 7 , D 9 , D 11 , D 13 , D 15 ) = XOR(1, 1 , 0 , 1 , 0 , 0 , 0) = 1 (Odd number of 1’s) P 2 = XOR(D 3 , D 6 , D 7 , D 10 , D 11 , D 14 , D 15 ) = XOR(1, 0 , 0 , 0 , 0 , 1 , 0) = 0 (Even number of 1’s) P 4 = XOR(D 5 , D 6 , D 7 , D 12 , D 13 , D 14 , D 15 ) = XOR(1, 0 , 0 , 1 , 0 , 1 , 0) = 1 P 8 = XOR(D 9 , D 10 , D 11 , D 12 , D 13 , D 14 , D 15 ) = XOR(1, 0 , 0 , 1 , 0 , 1 , 0) = 1 Put P 1 , P 2 , P 4 and P 8 into pattern above:
P 1 P 2 D 3 P 4 D 5 D 6 D 7 P 8 D 9 D 10 D 11 D 12 D 13 D 14 D 15
The output will be 101 1100 1100 1010.
- Problem 7.
(a)
P 1 P 2 D 3 P 4 D 5 D 6 D 7 P 8 D 9 D 10 D 11 D 12
C 1 = XOR(P 1 , D 3 , D 5 , D 7 , D 9 , D 11 ) = XOR(0, 0 , 1 , 1 , 1 , 1) = 0
C 2 = XOR(P 2 , D 3 , D 6 , D 7 , D 10 , D 11 ) = XOR(0, 0 , 1 , 1 , 0 , 1) = 1
C 4 = XOR(P 4 , D 5 , D 6 , D 7 , D 12 ) = XOR(0, 1 , 1 , 1 , 0) = 1
C 8 = XOR(P 8 , D 9 , D 10 , D 11 , D 12 ) = XOR(0, 1 , 0 , 1 , 0) = 0
C 8 C 4 C 2 C 1 = 0110 2 = 6 10 , so bit D 6 was flipped. Pulling out out the data bits and flipping bit D 6 gives 0101 1010 as the original word.
(b)
P 1 P 2 D 3 P 4 D 5 D 6 D 7 P 8 D 9 D 10 D 11 D 12
C 1 = XOR(P 1 , D 3 , D 5 , D 7 , D 9 , D 11 ) = XOR(1, 1 , 1 , 0 , 0 , 1) = 0
C 2 = XOR(P 2 , D 3 , D 6 , D 7 , D 10 , D 11 ) = XOR(0, 1 , 0 , 0 , 1 , 1) = 1
C 4 = XOR(P 4 , D 5 , D 6 , D 7 , D 12 ) = XOR(1, 1 , 0 , 0 , 0) = 0
C 8 = XOR(P 8 , D 9 , D 10 , D 11 , D 12 ) = XOR(0, 0 , 1 , 1 , 0) = 0
C 8 C 4 C 2 C 1 = 0010 2 = 2 10 , so parite bit P 2 was flipped — none of the data bits was flipped. Pulling out out the data bits gives 1100 0110 as the original word.
(c)
P 1 P 2 D 3 P 4 D 5 D 6 D 7 P 8 D 9 D 10 D 11 D 12
C 1 = XOR(P 1 , D 3 , D 5 , D 7 , D 9 , D 11 ) = XOR(1, 1 , 1 , 1 , 0 , 0) = 0
C 2 = XOR(P 2 , D 3 , D 6 , D 7 , D 10 , D 11 ) = XOR(0, 1 , 1 , 1 , 1 , 0) = 0
C 4 = XOR(P 4 , D 5 , D 6 , D 7 , D 12 ) = XOR(1, 1 , 1 , 1 , 0) = 0
C 8 = XOR(P 8 , D 9 , D 10 , D 11 , D 12 ) = XOR(1, 0 , 1 , 0 , 0) = 0
C 8 C 4 C 2 C 1 = 0000 2 = 0 10 , so no bit was flipped. Pulling out out the data bits gives 1111 0100 as the original word.
