Download Digital Electronics - 2005 2006 Exam - Electrical Engineering and more Exams Electrical Engineering in PDF only on Docsity!
THE MANCHESTER METROPOLITAN UNIVERSITY
FACULTY OF SCIENCE AND ENGINEERING
DEPARTMENT OF ENGINEERING AND TECHNOLOGY
SESSION 2005/
Examination for the BEng (HONS) ELECTRICAL AND ELECTRONIC ENGINEERING HND ELECTRICAL AND ELECTRONIC ENGINEERING YEAR/STAGE ONE
UNIT 64EE1103 : DIGITAL ELECTRONICS & SOFTWARE ENGINEERING
Tuesday 9 May 2006
9.30 am to 11.30 am
Instructions to Candidates
Answer FOUR questions.
All questions carry equal marks.
All answers are to be completed in the answer book not the examination paper. Ensure your answers all clearly indicated.
S302 12/07/
- (a) Complete the following table. [5]
HEX DECIMAL BINARY 10 2F 11001100 47 133
(b) Complete the following table. The results are to be shown in BINARY. [10]
A OPERATION B RESULT 102 AND (^1012) 410 OR (^510) 10112 PLUS (^10002) C 16 MINUS (^816) 11012 XOR (^102)
(c) Minimise the following equation. [6]
A(!B+C) + !A(C+!D) = F
(d) If A = 101, B=010 and Cin = 1, show the outputs on the circuit below. [4]
S302 12/07/2006 continued
- (a) Draw the circuit for a RS flip flop using nand gates. [4]
(b) Complete the K-map for the above circuit and identify the stable states. [8]
(c) Explain the terms ‘synchronous reset’ and ‘asynchronous reset’. [4]
(d) Complete the timing diagram for the RS circuit below. [9]
S302 12/07/2006 continued
- (a) Show how the JK flip flop below can be configured to give a T- type flip flop. [2]
(b) Draw a 3 bit ripple counter using the J-type flip flops configured as above. The counter is to be an ‘up counter’ with asynchronous, active low reset. [10]
(c) Explain how the above counter could be reconfigured to act as a ‘down counter’. [5]
(d) State a disadvantage of ripple counters at high clock speeds. [2]
(e) Complete the diagram below for a 4 bit synchronous counter. [6]
S302 12/07/2006 continued
Question 5 continued
S302 12/07/2006 Question 5 continued overleaf
- (a) Study the circuit shown below. Complete the table listing the opcodes in binary. [3]
Operation OPCODE AND OR NOT B
(b) Modify the circuit such that the following operations are executable - F=!A, F=A EXOR B, F=A AND !B. You are to use the minimum number of components. [9]
(c) State your new opcodes for all operations. [6]
Operation OPCODE AND OR NOT B NOT A EXOR A AND !B
(d) Explain the difference between RAM and ROM memories. [4]
(e) If a register file has an address bus 5 bits wide and a data bus 8 bits wide how many memory locations is it said to have? [3]
S302 12/07/2006 END
