ENEE 350: Fall 2006
Home Work 5
1. Consider the 2-bus data path given in Chapter 6. Write a sequence of MAL instructions
needed to fetch and execute the following MIPS-extension instruction “sw rt, offset(rs),”
which means “copy the contents of register rt onto memory location whose address is given
by adding offset to the contents of general-purpose register rs”. The fields for the opcode,
rs, and rt are the same as in MIPS formats. However, the offset field is encoded as a
separate 32-bit word after the instruction word holding the opcode, rs, and rt fields.
2. Exercise 6.1 in the class notes.
3. Consider the following data path (which is a modified version of the data path we studied
in class for the MIPS-0 ISA). Consider the following ISA-level instruction, and its associated
meaning. Notice that this instruction uses memory indirect addressing.
sw rt, offset(rs) ; copy the value in register rt to memory location whose address is
; present in memory location {sign extended offset + contents of register rs}
Its encoding is given below.
rs rt offset
Pattern
for SW
Write a sequence of MAL instructions to interpret the above sw instruction using the given
data path. Write comments for each MAL instruction, indicating what it does.
(RF)
File
Register
AOR
AIR
ALU
offset
Main
Memory
IR
+/-
PC
MAR
MDR
ADD AND
ID
CPU
Internal Bus
4
Address Bus
Data Bus
SEXT
1
