Project - Operating System Design and Implementation - Lecture Slides, Slides of Operating Systems

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What You Need to Know

for Project One

Dave Eckhardt

Jin Sik Lee, Alex Lam

Joshua Wise

Joey Echeverria

Steve Muckle

Carnegie Mellon University Synchronization

• (^) Final-exam date???
  • We don't choose it – the Registrar does
  • It's not decided yet – the Registrar decides when
• (^) Mid-term exam?
  • It will be an evening exam
• (^) Travel vs. mid-term exam and other events
  • Course web site has a schedule  Fairly-accurate predictor  (^) It is available before companies ask you to travel
  • So please check^ before^ making travel plans

Carnegie Mellon University Overview

• (^) Project 1 motivation
• (^) Mundane details (x86/IA-32 version) PICs, hardware interrupts, software interrupts and exceptions, the IDT, privilege levels, segmentation
• (^) Writing a device driver
• (^) Installing and using Simics
• (^) Project 1 pieces

Carnegie Mellon University Project 1 Motivation

• (^) Project 1 implements a game that runs directly on x86 hardware (no OS)
• (^) What are our hopes for Project 1?
  • introduction to kernel programming
  • a better understanding of the x86 arch
  • hands-on experience with hardware interrupts and device drivers
  • get acquainted with the simulator (Simics) and development tools

Carnegie Mellon University Mundane Details in x

• (^) Kernels work closely with hardware
• (^) This means you need to know about hardware
• (^) Some knowledge (registers, stack conventions) is assumed from 15-
• (^) You will learn more x86 details as the semester goes on
• (^) Use the Intel PDF fles as reference (http://www.cs.cmu.edu/~410/projects.html)

Carnegie Mellon University Mundane Details in x86: Privilege Levels

• (^) Processor has 4 “privilege levels” (PLs)
• (^) Zero most-privileged, three least-privileged
• (^) Processor executes at one of the four PLs at any given time
• (^) PLs protect privileged data, cause general protection faults

Carnegie Mellon University Memory Segmentation

• (^) There are different “kinds” of memory
• (^) Hardware “kinds”
  • Read-only memory (for booting)
  • Video memory (painted onto screen)
  • ...
• (^) Software “kinds”
  • Read-only memory (typically, program code)
  • Stack (grows down), heap (grows up)
  • ...

Carnegie Mellon University Memory Segmentation

• (^) Memory segment is a range of “the same kind”
• (^) Hardware “kind”
  • Mark video memory as “don't buffer writes”
• (^) Software “kind”
  • Mark all code pages read-only
• (^) Fancy software
  • Process uses many separate segments
  • Windows: each DLL is multiple segments  (Well, Win16... and Win32... but not Win64...)

Carnegie Mellon University x86 Segmentation Road Map

• (^) Segment = range of “same kind of memory”
• (^) Segment register = %CS, %SS, %DS, ... %GS
• (^) Segment selector = contents of a segment register - Which segment table and index do we mean? - What access privilege do we have to the segment?
• (^) Segment descriptor = defnition of segment
  • Which memory range?
  • What are its properties?

Carnegie Mellon University Memory Segmentation

• (^) When fetching an instruction, the processor asks for an address that looks like this: %CS: %EIP
• (^) So, if %EIP is 0xface then %CS:%EIP is the 64206th byte of the “code segment”.

Carnegie Mellon University Mundane Details in x86: Segmentation

• (^) Segment selector has a segment number, table selector, and requested privilege level (RPL)
• (^) The table-select flag selects a descriptor table
  • global descriptor table or local descriptor table
• (^) Segment number indexes into that descriptor table - 15-410 uses only global descriptor table (whew!)
• (^) Descriptor tables set up by operating system
  • 15-410 support code builds GDT for you (whew!)
• (^) You will still need to understand this, though...

Carnegie Mellon University Mundane Details in x86: Segmentation

• (^) Segment selector has a segment number, table selector, and requested privilege level (RPL)
• (^) Table selector (done)
• (^) Segment number/index (done)
• (^) RPL generally means “what access do I have?”
• (^) Magic special case: RPL in %CS
  • Defnes^ current processor privilege level
  • Think: “user mode” vs. “kernel mode”
  • Remember this for Project 3!!!

Carnegie Mellon University Mundane Details in x86: Segment Descriptors

• (^) Segment = area of memory with particular access/usage constraints
• (^) Base, size, “stuff”
• (^) Layout:

Carnegie Mellon University Mundane Details in x86: Segmentation

• (^) Consider %CS segment register's segment selector's segment descriptor - Assume base = 0xfeed - Assume limit > 64206
• (^) Assume %EIP contains 0xface
  • Then %CS:%EIP means “linear virtual address” 0xfeedface (0xfeed0000 + 0x0000face)
• (^) “Linear virtual address” fed to virtual memory hardware, if it's turned on (Project 3, not Project 1)