Comparing State Minimization and Assignment Tools for Quantum Circuit State Machines, Slides of Computer Science

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Engineering Models and

Circuit Realization of

Quantum State Machines

5. Complete

Automated

System for Design

of QSM

Problem Definition

• State assignment problem
  • Involves assigning binary coded values to the states of an FSM
  • The target is to minimize the area of the combinational circuit required to realize the FSM
  • The complexity of the combinational component of the FSM depends heavily on the state assignment and selection of memory elements
• Creating completely specified functions
  • Done by assigning values to the “don’t care” outputs to produce reversible logic

Tools and

Flow

Tools and Flow

1. DCARL – Don’t Care algorithm for reversible logic, developed at PSU in 2007 and presented at RM 2007
2. Assign values to the “don't cares” outputs, and map the outputs according to the assigned input values, creating thus a completely specified reversible Boolean function specification
3. Apply the MMD algorithm to this specification to synthesize the network
4. Compare the cost in terms of the number of Toffoli gates and keep track of the “don't cares” values with the minimal cost
5. Backtrack to find K solutions or until no more backtracking is possible

SIS Usage

• Inputs can be in KISS, BLIF format
• KISS – uses State Transition Graph format, can be synchronous as well as asynchronous
• BLIF – Netlist of Combinational gates and latches
• BLIF – internally represented as care network, don’t care network, can be verified by stg_cover command which simulates both symbolically
• Performs State minimization, State assignment, Retiming

Nova

State assignment tools

SIS - NOVA

• Target two-level PLA based implementations
• Optimizes the number of product terms called cubes
• The assignment needs to be in such a way that the area of

the combinational circuit required to realize the FSM is

minimized

• Solves two types of problems:
  • Constrained cubical embedding problem
    • Focused on input constraints
  • Covered constrained cubical embedding problem
    • Focused on both input and output constraints

NOVA

Algorithms used for

state encoding

3. igreedy_code
   • Heuristic encoding algorithms (approximate)
   • Target is to maximize input constraint satisfaction
   • User supplied encoding length (or default used)
   • Specially tailored for short code-lengths

• Algorithm that solves covered constrained cubical embedding problem:

1. iohybrid_code

• heuristic encoding algorithms (approximate)
• Target is to maximizes simultaneous input and output constraint satisfaction
• Based on an adaptation of ihybrid_code to deal with both input and output constraints

Jedi

Jedi

Algorithms used for

state encoding

1. The input dominant algorithm:
   1. works on the source states of the transitions of the FSMs (the states from which the transitions are triggered)
   2. pairs of present states which assert similar outputs and produce similar sets of next states are given high edge weights
   3. This has an effect of maximizing the size of common cubes in the boolean functions corresponding to the output and the next state lines
2. The output dominant algorithm
   1. works on the output states of the transitions of the FSMs
   2. pairs of next states which are produced by similar inputs and similar sets of present states are given high edge weights
   3. This has an effect of maximizing the number of common cubes in the boolean functions corresponding to the next state lines
3. The coupled approach
   • Uses a hybrid of the input and output dominant heuristics
4. Variations
   • Examples: one-hot, random, straight mapping

SIS example flow

Minimized State Encoded State Machine – part of

• .i Input state machine
• .o
• .p
• .s
• 0 A B
• 1 A C
• 0 B C
• 1 B B
• 0 C C
• 1 C D
• 0 D E
• 1 D A
• 0 E B
• 1 E C
  • .i Machine
  • .o
  • .p
  • .s
  • .r S
  • 0 S0 S1
  • 1 S0 S2
  • 0 S1 S2
  • 1 S1 S1
  • 0 S2 S2
  • 1 S2 S3
  • 0 S3 S0
  • 1 S3 S0
    • 0 S0 S1 BLIF output
    • 1 S0 S2
    • 0 S1 S2
    • 1 S1 S1
    • 0 S2 S2
    • 1 S2 S3
    • 0 S3 S0
    • 1 S3 S0
    • .code S0
    • .code S1
    • .code S2
    • .code S3

DCARL Usage/Description

• Inputs are test files that contains input vectors
• Input bits can be 0, 1 or x
• Outputs are text files, one for each solution, output file contains output vectors that are output bits
• Output bits can only be 0 or 1 (completely specified)
• No repeated output vectors (reversible)
• Some bits may be added to generate reversible functions
• Outputs of DCARL applied to MMD to choose best solution

DCARL example flow 1

Incompletely

Specified Input

001 101 11x 00x 01x xx xxx 111

Completely

Specified

Output 1 001 101 110 000 010 100 011 111

Completely

Specified

Output 2 001 101 110 000 011 010 100 111