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An overview of the altera lcd controller core for nios ii processors, including its functional description and software programming model. The lcd controller core connects to an optrex 16207 lcd panel via eleven signals and an avalon memory-mapped (avalon-mm) slave interface. The controller is sopc builder-ready and supports all altera fpga families. The software programming model uses ansi c standard library functions, such as printf(), to access the lcd controller as a character mode device. The document also discusses the lcd driver's features, such as character buffering, cursor control, and escape sequence support.
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Altera Corporation 10–
controller”) provides the hardware interface and software driver required for a Nios ®^ II processor to display characters on an Optrex 16207 (or equivalent) 16x2-character LCD panel. Device drivers are provided in the HAL system library for the Nios II processor. Nios II programs access the LCD controller as a character mode device using ANSI C standard library routines, such as printf(). The LCD controller is SOPC Builder- ready, and integrates easily into any SOPC Builder-generated system.
The Nios II Embedded Design Suite (EDS) includes an Optrex LCD module and provide several ready-made example designs that display text on the Optrex 16207 via the LCD controller. For details about the Optrex 16207 LCD module, see the manufacturer's Dot Matrix Character LCD Module User’s Manual available at http://www.optrex.com.
This chapter contains the following sections:
■ “Functional Description” ■ “Device and Tools Support” on page 10– ■ “Instantiating the Core in SOPC Builder” on page 10– ■ “Software Programming Model” on page 10–
The LCD controller hardware consists of two user-visible components:
■ Eleven signals that connect to pins on the Optrex 16207 LCD panel — These signals are defined in the Optrex 16207 data sheet. ● E – Enable (output) ● RS – Register Select (output) ● R/W – Read or Write (output) ● DB0 through DB7 – Data Bus (bidirectional)
■ An Avalon Memory-Mapped (Avalon-MM) slave interface that provides access to 4 registers — The HAL device drivers make it unnecessary for users to access the registers directly. Therefore, Altera does not provide details about the register usage. For further details, see “Software Programming Model” on page 10–2.
NII51019-7.1.
10–2 Altera Corporation
Quartus II Handbook, Volume 5
Figure 10–1 shows a block diagram of the LCD controller core.
Figure 10–1. LCD Controller Block Diagram
The LCD controller hardware supports all Altera FPGA families. The LCD controller drivers support the Nios II processor. The drivers do not support the first-generation Nios processor.
In SOPC Builder, the LCD controller component has the name Character LCD (16x2, Optrex 16207). The LCD controller does not have any user-configurable settings. The only choice to make in SOPC Builder is whether or not to add an LCD controller to the system. For each LCD controller included in the system, the top-level system module includes the 11 signals that connect to the LCD module.
This section describes the software programming model for the LCD controller.
Altera provides HAL system library drivers for the Nios II processor that enable you to access the LCD controller using the ANSI C standard library functions. The Altera-provided drivers integrate into the HAL system library for Nios II systems. The LCD driver is a standard character-mode device, as described in the Nios II Software Developer's Handbook. Therefore, using printf() is the easiest way to write characters to the display.
address data control (^) DB0 .. DB
R/W
RS
E
Optrex 16207 LCD Module
LCD Controller
Avalon-MM slave interface to on-chip logic
Altera FPGA
10–4 Altera Corporation
Quartus II Handbook, Volume 5
The LCD controller drivers are not included in the system library when the Reduced device drivers option is enabled for the system library. If you want to use the LCD controller while using small drivers for other devices, then add the preprocessor option -DALT_USE_LCD_16207 to the preprocessor options.
The LCD controller is accompanied by the following software files. These files define the low-level interface to the hardware and provide the HAL drivers. Application developers should not modify these files.
■ altera_avalon_lcd_16207_regs.h — This file defines the core’s register map, providing symbolic constants to access the low-level hardware. ■ altera_avalon_lcd_16207.h, altera_avalon_lcd_16207.c — These files implement the LCD controller device drivers for the HAL system library.
The HAL device drivers make it unnecessary for you to access the registers directly. Therefore, Altera does not publish details about the register map. For more information, the altera_avalon_lcd_16207_regs.h file describes the register map, and the Dot Matrix Character LCD Module User’s Manual from Optrex describes the register usage.
The LCD controller does not generate interrupts. However, the LCD driver's text scrolling feature relies on the HAL system clock driver, which uses interrupts for timing purposes.
This chapter references the following document:
■ Nios II Software Developer’s Handbook
Altera Corporation 10–
Optrex 16207 LCD Controller Core
Table 10–2 shows the revision history for this chapter.
Table 10–2. Document Revision History
Date and Document Version
Changes Made Summary of Changes
May 2007 v7.1.
● Chapter 10 was formerly chapter 8. ● Added table of contents to Overview section. — March 2007 v7.0.
No change from previous release. (^) —
November 2006 v6.1.
● Updated Avalon terminology because of changes to Avalon technologies ● Changed old “Avalon switch fabric” term to “system interconnect fabric” ● Changed old “Avalon interface” terms to “Avalon Memory- Mapped interface”
For the 6.1 release, Altera released the Avalon Streaming interface, which necessitated some re- phrasing of existing Avalon terminology.
May 2006 v6.0.
Chapter title changed, but no change in content from previous release.
—
October 2005 v5.1.
No change from previous release. (^) —
May 2005 v5.0.
No change from previous release. Previously in the Nios II Processor Reference Handbook.
—
September 2004 v1.
Initial release. —