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Digital Systems and Microprocessors Exam for Electronic Engineering Students, Exams of Microprocessors

Cochin University of Science and TechnologyMicroprocessors

The autumn 2007 exam for the digital systems and microprocessors module of the bachelor of engineering (honours) in electronic engineering at cork institute of technology. The exam consists of five questions and covers topics such as 68000 instruction sets, microprocessor architecture, memory mapping, and i/o circuit operation. Students are required to complete the exam in three hours.

Typology: Exams

2012/2013

Uploaded on 03/31/2013

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Cork Institute of Technology
Bachelor of Engineering (Honours) in Electronic Engineering – Stage 2
(NFQ – Level 8)
Autumn 2007
Digital Systems and Microprocessors
(Time: 3 Hours)
Answer any FIVE questions
68000 Instruction Sets are available.
Blank Before & After Tables available
Examiners: Prof. G. Hurley
Dr. S. Foley
Dr. P O’Connor
Q1 (a) With the aid of the 68000 instruction set supplied, complete the before-and-after table,
Figure 1, accompanying this paper. (10 marks)
(b) Draw a block diagram showing the main parts of an overall microcomputer and describe
briefly the function of each block. (4marks)
(c) What range of values can be represented by 16-bit 2’s complemented numbers?
Find the decimal equivalent of the 2’s complement number $A73D-showing all
workings. (3 marks)
(d) If a ROM chip is described as a 4kByte device, state the pins that you would expect to
find on its pinout diagram – show all workings. (3 marks)
Q2 (a) Briefly explain the difference between an 8-bit and a 16-bit MPU, and state the
implication of these terms on the internal structure of the device. (3 marks)
(b) Draw a block diagram showing the internal structure of the MC6800 microprocessor
(MPU). (5 marks)
(c) Identify each item of information in the line of assembly language code below.
00400400 907C01F4 SUB.W #500, D0 (4 marks)
(d) Outline in detail how the instruction in (c) would be processed by the MPU. (8 marks)
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Cork Institute of Technology

Bachelor of Engineering (Honours) in Electronic Engineering – Stage 2

(NFQ – Level 8)

Autumn 2007

Digital Systems and Microprocessors

(Time: 3 Hours)

Answer any68000 Instruction Sets are available. FIVE questions Blank Before & After Tables available

Examiners: Prof. G. HurleyDr. S. Foley Dr. P O’Connor

Q1 (a) With the aid of the 68000 instruction set supplied, complete the before-and-after table, Figure 1, accompanying this paper. (10 marks) (b) Draw a block diagram showing the main parts of an overall microcomputer and describe briefly the function of each block. (4marks) (c) What range of values can be represented by 16-bit 2’s complemented numbers? Find the decimal equivalent of the 2’s complement number $A73D-showing all workings. (3 marks) (d) If a ROM chip is described as a 4kByte device, state the pins that you would expect to find on its pinout diagram – show all workings. (3 marks)

Q2 (a) Briefly explain the difference between an 8-bit and a 16-bit MPU, and state the implication of these terms on the internal structure of the device. (3 marks) (b) Draw a block diagram showing the internal structure of the MC6800 microprocessor (MPU). (5 marks) (c) Identify each item of information in the line of assembly language code below. 00400400 907C01F4 SUB.W #500, D0 (4 marks) (d) Outline in detail how the instruction in (c) would be processed by the MPU. (8 marks)

Q3 (a) What is the purpose of the address bus in a microcomputer? Explain fully why address line A0 is not available on the 68000 MPU. (4 marks) (b) Why do addresses in successive memory locations in a standard 68000-based memory diagram increase in steps of two? If we reserve a 500 10 -byte block of memory starting at address $400500, what is the address of the final location in this block? (4 marks) (c) A 68K-microcomputer system (like the Flight-68K) requires 2Mbytes of RAM, with a base address $400000. RAM chips of capacity 512KB are available, each with a single active-low CS input. (i) Devise a complete memory map, which shows the addresses occupied by each 512KB chip. (ii) Draw a detailed block diagram, highlighting address decoding, microprocessor control lines and address and data lines. (12 marks)

Q4 (a) Draw a functional block diagram of the MC68230 PI/T chip, showing all groups of connections to this device. (5 marks) (b) List the registers associated with Port A of the PI/T and describe the function performed by each of these registers. (4 marks) (c) The following components are connected to Port A of the PI/T:- (i) Two push-to-make push-button switches connected to lines 0 and 1 (ii) A green LED connected to line 6 and a red connected to line 7. Draw a circuit diagram to show how the above arrangement might be implemented. (5 marks) (d) Table 4.1 below shows a segment of code written to exercise the I/O circuit in (c). Describe in terms of the I/O circuit , the action performed by each instruction in the code, and hence the overall function performed by this code segment. (6 marks)

(d) State the purpose of the stack in a computer, and hence explain how the stack operates in a 68000-based system. Pay particular attention to the role of A7 in this operation. (sample code and a diagram are required). (8 marks)

Q6 (a)^ Use the truth-table in Table.6-1 to implement a Full-Subtractor circuit using a 3-8 line decoder and additional gates (where Diff = (X-Y) and Z is the borrow-in). X Y Z Borrow Diff 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 0 1 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 0 0 1 1 1 1 1 Table.6-1 (6 marks)

(b) Demonstrate, using suitable circuit examples, the interfacing connections between TTL and CMOS gates. (6 marks). (c) Explain the operation of a Tri-state logic buffer and why they are used in digital computer systems. Hence, describe a (^) bi-directional tri-state buffer/transceiver and show how digital signals are controlled on the bus. (8 marks)