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Sample - Introductory Microcomputer Interfacing Laboratory - Solved Exam, Exams of Microcomputers

Bharat Ratna Dr. B. R. Ambedkar UniversityMicrocomputers

Main points of this past exam are: Sample, Hold Amplifier, Transition Voltages, Converter, Frequency Aliasing, Glitch, Digital Filter

Typology: Exams

2012/2013

Uploaded on 03/22/2013

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UNIVERSITY OF CALIFORNIA
College of Engineering
Electrical Engineering and Computer Sciences Department
145M Microcomputer Interfacing Lab
Final Exam Solutions May 17, 1990
1A Sample and Hold Amplifier: Analog device that either amplifies an input signal or holds its
output at a constant value, depending on a digital control signal.
1B Transition Voltages: The analog input voltages at which the output changes by one least
significant bit.
1C Frequency Aliasing: Erroneous lower frequencies that arise when a waveform is periodically
sampled at less than twice its maximum frequency.
1D Glitch: Brief erroneous spike that occurs in the output of a D/A converter when >1 input bits
change at slightly different times.
1E Digital Filter: Method for transforming a series of digital values where each output value
depends on some previous input and output values. (2 points off if dependence on previous
inputs and outputs not mentioned.)
1F Power Supply Sensitivity: Ratio of % change in output voltage to a % change in power supply
voltage.
2A Successive Approximation:
1) Set all N output bits to zero
2) For n = N to 1, repeat steps 3 and 4 (bit N is the MSB, bit 1 is the LSB)
3) Set bit n to one and send the N-bit number to a D/A converter
4) Compare the input with the D/A output. If greater, set bit n to zero
Number of steps = N
(3 points off if number of steps omitted or wrong, 4 points off if description of operation
omitted)
2B Flash: Input is sent to the V+ input of 2N – 1 comparators. A series of resistors produces an
ascending series of reference voltages, one to each V– input of the comparators. The lower
comparators with V+ > V– have a logical output of one. The upper comparators with V+ < V–
have a logical output of zero. Fast digital logic generates the number of the comparator at the
boundary, and this number is the digital representation of the analog input.
Number of steps = 1 Note: 3 points off if number of steps omitted or wrong
2C Tracking: The input to be converted is compared to the output of a D/A converter. The input
of the D/A converter is the output of an up/down counter. If the D/A output is low, add one to
the counter. If the D/A output is high, subtract one from the counter.
Number of steps = 2N (Considers worst case Nyquist limit, where input swings between
minimum and maximum values between samples.
Note: 3 points off if number of steps omitted or wrong
3A
Data ready strobe
Start conversion
Parallel
Input/
Output
Port
D/A
Converter
A/D
Converter
16
12 Micro-
Computer
Analog
145M Final Exam Solutions page 1 May 17, 1990 S. Derenzo
pf3

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UNIVERSITY OF CALIFORNIA

College of Engineering Electrical Engineering and Computer Sciences Department

145M Microcomputer Interfacing Lab

Final Exam Solutions May 17, 1990

1A Sample and Hold Amplifier:^ Analog device that either amplifies an input signal or holds its

output at a constant value, depending on a digital control signal.

1B Transition^ Voltages:^ The analog input voltages at which the output changes by one least

significant bit.

1C Frequency Aliasing:^ Erroneous lower frequencies that arise when a waveform is periodically

sampled at less than twice its maximum frequency.

1D Glitch:^ Brief erroneous spike that occurs in the output of a D/A converter when >1 input bits

change at slightly different times.

1E Digital^ Filter:^ Method for transforming a series of digital values where each output value

depends on some previous input and output values. (2 points off if dependence on previous inputs and outputs not mentioned.)

1F Power Supply Sensitivity:^ Ratio of % change in output voltage to a % change in power supply

voltage.

2A Successive Approximation:

  1. Set all N output bits to zero
  2. For n = N to 1, repeat steps 3 and 4 (bit N is the MSB, bit 1 is the LSB)
  3. Set bit n to one and send the N-bit number to a D/A converter
  4. Compare the input with the D/A output. If greater, set bit n to zero Number of steps = N (3 points off if number of steps omitted or wrong, 4 points off if description of operation omitted)

2B Flash:^ Input is sent to the V+^ input of 2

N – 1 comparators. A series of resistors produces an ascending series of reference voltages, one to each V– input of the comparators. The lower comparators with V+ > V– have a logical output of one. The upper comparators with V+ < V– have a logical output of zero. Fast digital logic generates the number of the comparator at the boundary, and this number is the digital representation of the analog input. Number of steps = 1 Note: 3 points off if number of steps omitted or wrong

2C Tracking:^ The input to be converted is compared to the output of a D/A converter.^ The input

of the D/A converter is the output of an up/down counter. If the D/A output is low, add one to the counter. If the D/A output is high, subtract one from the counter. Number of steps = 2 N^ (Considers worst case Nyquist limit, where input swings between minimum and maximum values between samples. Note: 3 points off if number of steps omitted or wrong

3A

Data ready strobe

Start conversion

Parallel Input/ Output Port

D/A

Converter

A/D

Converter

12 Micro- Computer

Analog

3B Vary the digital input to the 16-bit D/A and convert the D/A output with the A/D^ converter

being tested. Read the output of the A/D and determine the D/A input values where the A/D output changes by one bit. These correspond to the transition voltages. The absolute accuracy is the agreement of all the transition voltages with their ideal values. Alternatively, you could compute the center of the “steps” and compare those with their ideal values. Note: 2 points off if you did not determine the transition voltages. If you simply compare the A/D output with the D/A input, then even a “perfect” A/D will have an absolute accuracy error due to quantization error. This point was covered in lecture and in the midterm solution sheets.

3C Compare the transition voltages measured in part 3B with a straight line passing through the

lowest V(0,1) and highest V(2N^ –2, 2N^ –1) transition voltages.

3D Compute the step sizes as the differences between neighboring transition voltages measured in

part 3B. The differential linearity error is the differences between the step sizes and their aver- age value.

3E The typical accuracy of the procedures in 3B, 3C, and 3D is determined by the ±1/2 LSB of the

D/A. Since each A/D step is 16 times larger (12 bits vs 16 bits), the D/A accuracy is equivalent to 1/32 LSB of the A/D. Both 1/16 and 1/64 were accepted. Note: some students apparently misinterpreted the question to read “what is the typical value of the quantities measured in parts A, B, and C” rather than “... the typical accuracy.. .”.

4A

Microphone Amplifier (Gain = 1000)

10 mV p-p

10 V

p-p

Micro- computer

Analog input circuit with S/H and A/D

  • Low-pass to pass signals below 20 kHz and block frequencies above f /
  • High-pass to pass signal above 10 Hz

Analog filter

s

Timer/counter

Start conversion

Digital tape storage

To keep the time interval between samples constant to one part in 10^6 , a timer/counter unit must supply the “start conversion” pulses (i.e. hardware triggering). There is no way that such constancy can be obtained with software triggering. Note that timers can be very flexible pulse generators, where the pulse width and period can be set by a computer program. Note: 4 points off if no A/D, 4 points off if no amplifier, 4 points off if no timer used to start conversion, 4 points off if no digital storage, 3 points off if no S/H, 3 points off if no anti-aliasing filter, 2 points off if no computer.

4B fs^ = 2^ ×^ 20 kHz = 40 kHz

4C An anti-aliasing filter is needed to suppress frequencies^ above^ fs/2^ while^ passing^ signal

frequencies from 10 Hz to 20 kHz. Assuming that you use a filter that drops from nearly unity gain at 20 kHz to a low value at 30 kHz, you could design for fs = 60 kHz. The four-pole filter you used in the lab exercise would only drop a factor of about 5 in amplitude from 20 to 30 kHz and an 8-pole filter would drop by a factor of about 25. Note: Answers between 44 and 120 kHz were acceptable. 2 points off if the answer was 40 kHz and a good argument for an anti-aliasing filter with a perfectly sharp response at 20 kHz was not given.