ECE 2030 Quiz #2 - Electrical and Computer Engineering, Georgia Tech, Quizzes of Electrical and Electronics Engineering

A quiz for the ece 2030 course at the georgia institute of technology. The quiz includes five problems related to digital electronics, such as implementing functions using decoders and shift registers, and completing state diagrams and timing diagrams. Students are required to answer each problem with the correct number of points and clearly identify their answers.

Typology: Quizzes

Pre 2010

Uploaded on 08/04/2009

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GEORGIA INSTITUTE OF TECHNOLOGY
School of Electrical and Computer Engineering
ECE 2030
QUIZ #2
Friday, November 11, 2005
Name:
Last, First
Closed book, one page of notes allowed.
None of the problems require involved calculations. Reconsider your approach before
doing something tedious.
Clearly identify each answer.
Part pts Score
1 15
2 15
3 25
4 25
5 25
Total 100
pf3
pf4
pf5

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GEORGIA INSTITUTE OF TECHNOLOGY

School of Electrical and Computer Engineering

ECE 2030

QUIZ

Friday, November 11, 2005

Name:

Last, First

• Closed book, one page of notes allowed.

• None of the problems require involved calculations. Reconsider your approach before

doing something tedious.

• Clearly identify each answer.

Part pts Score

Total 100

Implement the following function using a 3-to-8 bit decoder.

F = b + a c

a b c F 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

Implement the following function using a 4-to-1 multiplexor.

F = b + a c

State machines can be used to decode instructions. The state diagram shown below takes as its input a stream of bits and looks for a preamble of 11 that indicates an instruction will follow. There are three possible instructions: 1, 01, 00 and the outputs corresponding to these instructions are 11, 10, and 01 respectively. For this state machine there is one input, the digital signal x, and two output lines, A, and B. Fill in the state table below based on the state diagram. You can assume that upon power-on and/or reset the state machine starts in state 000.

000/

001/ 011/

111/11 010/

110/

100/

0

0

0

1

1

1

1

0 0,

0,

0,

Current State Input Next State Output S 2 S 1 S 0 x N S 2 N S 1 N S 0 A B 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1

Given the circuit below, complete the timing diagram. Note that two kinds of D-flip-flops are used.

X (^) D Q D Q D

C

Q0 D1 Q

C

D

Q

X

Q

D