Quiz 2 Solutions for ECE65 (Fall 2009) - Problems 1, 2, and 3 - Prof. Farrokh Najmabadi, Quizzes of Electrical and Electronics Engineering

Solutions to quiz 2 for the ece65 (fall 2009) course, including problem 1 about finding the output voltage (vo) for an nmos circuit with given parameters, problem 2 about finding the current (i) in a circuit with diodes, and problem 3 about finding the bias point of a transistor circuit.

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ECE65 (Fall 2009), Quiz 2
Notes: 1. Write your answers on these three sheets.
2. For each problem, 20% of points are alloacted for the correct final answer.
Problem 1. Consider NMOS circuit below with K= 0.4 mA/V2,Vt= 2 V, RD= 1 Kโ„ฆ
and VDD = 12 V. Find vowhen vi= 0 and 6 V. (6pt)
iD
D
S
G
vi
vo
DD
V
D
R
GS-KVL: vGS =vi
DS-KVL: VDD =RDiD+vDS
A) vi= 0 V. From GS-KVL, we get vGS =vi= 0. As vGS < Vt= 2 V, NMOS is in
cut-off, iD= 0, and vDS is found from DS-KVL:
DS-KVL: vo=vDS =VDD โˆ’RDiD= 12 V
B) vi= 6 V. From GS-KVL, we get vGS = 6 V. Since vGS > Vt, NMOS is not in
cut-off. Assume NMOS in saturation, then:
iD=K(vGS โˆ’Vt)2= 0.4ร—10โˆ’3(6 โˆ’2)2= 6.4 mA
DS-KVL: vDS =VDD โˆ’RDiD= 12 โˆ’6.4ร—10โˆ’3ร—1ร—103= 5.6 V
Since vDS = 5.6> vGS โˆ’Vt= 6 โˆ’2 = 4, NMOS is in saturation.
Therefore, vo=vDS = 5.8 V.
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ECE65 (Fall 2009), Quiz 2

Notes: 1. Write your answers on these three sheets.

  1. For each problem, 20% of points are alloacted for the correct final answer.

Problem 1. Consider NMOS circuit below with K = 0.4 mA/V^2 , Vt = 2 V, RD = 1 Kฮฉ and VDD = 12 V. Find vo when vi = 0 and 6 V. (6pt)

D iD

S

vi G

vo

VDD

R D

GS-KVL: vGS = vi DS-KVL: VDD = RDiD + vDS

A) vi = 0 V. From GS-KVL, we get vGS = vi = 0. As vGS < Vt = 2 V, NMOS is in cut-off, iD = 0, and vDS is found from DS-KVL:

DS-KVL: vo = vDS = VDD โˆ’ RDiD = 12 V

B) vi = 6 V. From GS-KVL, we get vGS = 6 V. Since vGS > Vt, NMOS is not in cut-off. Assume NMOS in saturation, then:

iD = K(vGS โˆ’ Vt)^2 = 0. 4 ร— 10 โˆ’^3 (6 โˆ’ 2)^2 = 6.4 mA DS-KVL: vDS = VDD โˆ’ RDiD = 12 โˆ’ 6. 4 ร— 10 โˆ’^3 ร— 1 ร— 103 = 5.6 V

Since vDS = 5. 6 > vGS โˆ’ Vt = 6 โˆ’ 2 = 4, NMOS is in saturation.

Therefore, vo = vDS = 5.8 V.

Problem 2. Find I in the circuit below with Si diodes(10 pts).

V 1 V 2

5V

โˆ’5V

I

D D

1k

2k

I 1

ID

V 1 V 2

5V

I

1k I 1

2k

ID

โˆ’5V

0.7V + 0.7V โˆ’

โˆ’

A good starting guess is that both didoes are forward biased: vD 1 = 0. 7 V , iD 1 > 0, and vD 2 = 0. 7 V , iD 2 > 0.

Replacing the diodes with their circuit model (see circuit), we see: V 1 = vD 1 = 0.7 V and

V 2 โˆ’ V 1 = vD 2 = 0. 7 โ†’ V 2 = 0

Ohm Law: I 1 =

5 โˆ’ V 1

= 4.3 mA

Ohm Law: iD 2 =

V 2 โˆ’ (โˆ’5)

= 2.5 mA

KCL: I = iD 1 = I 1 โˆ’ iD 2 = 4. 3 โˆ’ 2 .5 = 1.8 mA

Since both iD 1 and iD 2 are positive, our assumption of both diodes ON is justified and I = 1.8 mA.

Solution for the other three possible cases for diodesโ€™ states are given below showing them all to be incorrect:

D1 ON, D2 OFF D1 OFF, D2 ON D1 OFF, D2 OFF

V 1 V 2

5V

I

1k I 1

2k

ID

โˆ’5V

0.7V + โˆ’

V 1 V 2

5V

I

1k I 1

2k

ID

โˆ’5V

+0.7V โˆ’

V 1 V 2

5V

I

1k I 1

2k

ID

โˆ’5V

I 1 = iD 1 & iD 2 = 0 I 1 = iD 2 = (10 โˆ’ 0 .7)/ 3000 I 1 = 0 & iD 2 = 0 V 1 = 0.7 & V 2 = โˆ’5 V I 1 = iD 2 = 3.1 mA V 1 = 5 & V 2 = โˆ’5 V vD 2 = V 1 โˆ’ V 2 = 5. 7 > 0 .7 V vD 1 = V 1 = 5 โˆ’ 1000 i 1 vD 1 = V 1 = 5 > 0 .7 V D2 is NOT OFF vD 1 = 1. 9 > 0 .7 V D1 is NOT OFF D1 is NOT OFF