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TL/F/
Ripple Carry Binary Counters CD4060BM/BC 14-Stage Ripple Carry Binary Counters CD4020BM/BC 14-Stage Ripple Carry Binary Counters/CD4040BM/BC 12-Stage
February 1988
CD4020BM/CD4020BC
14-Stage Ripple Carry Binary Counters
CD4040BM/CD4040BC
12-Stage Ripple Carry Binary Counters
CD4060BM/CD4060BC
14-Stage Ripple Carry Binary Counters
General Description
The CD4020BM/CD4020BC, CD4060BM/CD4060BC are 14-stage ripple carry binary counters, and the CD4040BM/ CD4040BC is a 12-stage ripple carry binary counter. The counters are advanced one count on the negative transition of each clock pulse. The counters are reset to the zero state by a logical ‘‘1’’ at the reset input independent of clock.
Features
Y (^) Wide supply voltage range 1.0V to 15V Y (^) High noise immunity 0.45 V (^) DD (typ.) Y (^) Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS Y (^) Medium speed operation 8 MHz typ. at V (^) DD e (^) 10V Y (^) Schmitt trigger clock input
Connection Diagrams
Dual-In-Line Package CD4020BM/CD4020BC
TL/F/5953– Top View
Order Number CD4020B, CD4040B or CD4060B
Dual-In-Line Package CD4040BM/CD4040BC
TL/F/5953– Top View
Dual-In-Line Package CD4060BM/CD4060BC
TL/F/5953– Top View
C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 and 2)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VDD) b0.5V to a18V Input Voltage (VIN) b0.5V to VDD a0.5V
Storage Temperature Range (TS ) b 65 ßC to a 150 ßC
Package Dissipation (P (^) D) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (T (^) L)
(Soldering, 10 seconds) 260 ßC
Recommended Operating
Conditions
Supply Voltage (VDD) a3V to a15V Input Voltage (VIN) 0V to VDD Operating Temperature Range (T (^) A)
CD40XXBM b 55 ßC to a 125 ßC
CD40XXBC b 40 ßC to a 85 ßC
DC Electrical Characteristics CD40XXBM (Note 2)
Symbol Parameter Conditions
b 55 ßC a 25 ßC a 125 ßC
Units Min Max Min Typ Max Min Max
I (^) DD Quiescent Device Current VDD e^ 5V, VIN e^ VDD or VSS 5 5 150 mA V (^) DD e^ 10V, VIN e^ VDD or VSS 10 10 300 mA V (^) DD e^ 15V, VIN e^ VDD or VSS 20 20 600 mA
VOL Low Level Output Voltage VDD e 5V 0.05 0 0.05 0.05 V VDD e^ 10V 0.05 0 0.05 0.05 V VDD e 15V 0.05 0 0.05 0.05 V
VOH High Level Output Voltage VDD e^ 5V 4.95 4.95 5 4.95 V VDD e^ 10V 9.95 9.95 10 9.95 V VDD e^ 15V 14.95 14.95 15 14.95 V
VIL Low Level Input Voltage VDD e^ 5V, VO e^ 0.5V or 4.5V 1.5 2 1.5 1.5 V V (^) DD e^ 10V, VO e^ 1.0V or 9.0V 3.0 4 3.0 3.0 V VDD e^ 15V, VO e^ 1.5V or 13.5V 4.0 6 4.0 4.0 V
VIH High Level Input Voltage VDD e^ 5V, VO e^ 0.5V or 4.5V 3.5 3.5 3 3.5 V V (^) DD e^ 10V, VO e^ 1.0V or 9.0V 7.0 7.0 6 7.0 V V (^) DD e^ 15V, VO e^ 1.5V or 13.5V 11.0 11.0 9 11.0 V
I (^) OL Low Level Output Current VDD e^ 5V, VO e^ 0.4V 0.64 0.51 0.88 0.36 mA (See Note 3) VDD e 10V, VO e 0.5V 1.6 1.3 2.25 0.9 mA VDD e^ 15V, VO e^ 1.5V 4.2 3.4 8.8 2.4 mA
I (^) OH High Level Output Current VDD e^ 5V, VO e^ 4.6V b0.64 b0.51 b0.88 b0.36 mA (See Note 3) VDD e^ 10V, VO e^ 9.5V b1.6 b1.3 b2.25 b0.9 mA V (^) DD e^ 15V, VO e^ 13.5V b4.2 b3.4 b8.8 b2.4 mA
I (^) IN Input Current VDD e^ 15V, VIN e^ 0V b0.10 b 10 b^5 b0.10 b1.0 mA V (^) DD e^ 15V, VIN e^ 15V 0.10 10 b^5 0.10 1.0 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation. Note 2: V (^) SS e 0V unless otherwise specified. Note 3: Data does not apply to oscillator points w 0 and w 0 of CD4060BM/CD4060BC. I (^) OH and I (^) OL are tested one output at a time.
DC Electrical Characteristics 40XXBC (Note 2)
Symbol Parameter Conditions
b 40 ßC a 25 ßC a 85 ßC
Units Min Max Min Typ Max Min Max I (^) DD Quiescent Device Current VDD e^ 5V, VIN e^ VDD or VSS 20 20 150 mA V (^) DD e^ 10V, VIN e^ VDD or VSS 40 40 300 mA V (^) DD e^ 15V, VIN e^ VDD or VSS 80 80 600 mA VOL Low Level Output Voltage VDD e^ 5V 0.05 0 0.05 0.05 V VDD e^ 10V 0.05 0 0.05 0.05 V VDD e^ 15V 0.05 0 0.05 0.05 V
AC Electrical Characteristics* CD4060BM/CD4060BC
T A e^25 ßC, C L e^ 50 pF, R L e^ 200k, t r e^ tf e^ 20 ns, unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units tPHL4, tPLH4 Propagation Delay Time to Q 4 VDD e 5V 550 1300 ns VDD e^ 10V 250 525 ns VDD e 15V 200 400 ns tPHL, tPLH Interstage Propagation Delay Time VDD e^ 5V 150 330 ns from Q (^) n to Qna 1 VDD e^ 10V 60 125 ns VDD e^ 15V 45 90 ns tTHL, tTLH Transition Time VDD e^ 5V 100 200 ns VDD e^ 10V 50 100 ns VDD e^ 15V 40 80 ns tWL, tWH Minimum Clock Pulse Width VDD e^ 5V 170 500 ns VDD e^ 10V 65 170 ns VDD e^ 15V 50 125 ns trCL, tfCL Maximum Clock Rise and Fall Time VDD e^ 5V No Limit ns VDD e 10V No Limit ns VDD e^ 15V No Limit ns fCL Maximum Clock Frequency VDD e^ 5V 1 3 MHz VDD e^ 10V 3 8 MHz VDD e^ 15V 4 10 MHz tPHL(R) Reset Propagation Delay VDD e^ 5V 200 450 ns VDD e^ 10V 100 210 ns VDD e^ 15V 80 170 ns tWH(R) Minimum Reset Pulse Width VDD e^ 5V 200 450 ns VDD e^ 10V 100 210 ns VDD e^ 15V 80 170 ns Cin Average Input Capacitance Any Input 5 7.5 pF Cpd Power Dissipation Capacitance 50 pF
*AC Parameters are guaranteed by DC correlated testing.
CD4060B Typical Oscillator Connections
RC Oscillator
TL/F/5953–
Crystal Oscillator
TL/F/5953–
Schematic Diagrams
CD4020BM/CD4020BC Schematic Diagram
TL/F/5953– CD4040BM/CD4040BC Schematic Diagram
TL/F/5953– CD4060BM/CD4060BC Schematic Diagram
TL/F/5953–
