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Material Type: Exam; Class: ENGINEERING DESIGN PROJECT; Subject: Electrical & Computer Engineer; University: Oregon State University; Term: Fall 2006;
Typology: Exams
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December 2001
Symbol Parameter Value Unit Vs Supply voltage 10 V Vi Input signals 7 V Ptot Total power dissipation (Tamb = 70°C) 1 W Tstg, T (^) j Storage and junction temperature -40 to + 150 (^) °C
L297/ L297D
19 HALF/FULL Half/full step select input. When high selects half step operation,when low selects full step operation. One-phase-on full step mode is obtained by selecting FULL when the L297’s translator is at aneven-numbered state. Two-phase-on full step mode is set by selecting FULL when thetranslator is at an odd numbered position. (The home position is designate state 1). 20 RESET Reset input. An active low pulse on this input restores thetranslator to the home position (state 1, ABCD = 0101).
Symbol Parameter DIP20 SO20 Unit R (^) th-j-amb Thermal resistance junction-ambient max (^80 100) °C/W
Symbol Parameter Test conditions Min. Typ Max. Unit Ileak Leakage current (pin 3) V (^) CE = 7 V (^1) μA Vsat Saturation voltage (pin 3) I = 5 mA 0.4 V Voff Comparators offset voltage(pins 13, 14, 15) Vref = 1 V 5 mV Io Comparator bias current(pins 13, 14, 15) -100 10 μA Vref Input reference voltage (pin 15) 0 3 V tCLK Clock time 0.5 (^) μs tS Set up time 1 μs t (^) H Hold time 4 μs t (^) R Reset time (^1) μs t (^) RCLK Reset to clock delay (^1) μs
SO20MEC
h x 45˚
SO
DIM. mm^ inch MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0. A1 0.1 0.3 0.004 0. B 0.33 0.51 0.013 0. C 0.23 0.32 0.009 0. D 12.6 13 0.496 0. E 7.4 7.6 0.291 0. e 1.27 0. H 10 10.65 0.394 0. h 0.25 0.75 0.010 0. L 0.4 1.27 0.016 0. K 0˚ (min.)8˚ (max.)
OUTLINE AND MECHANICAL DATA
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