Memory Addressing Organization for
Stream-Based Reconfigurable Computing
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Stream Based - Multimedia Signal Processing - Lecture Slides, Slides of Electronics engineering
These are the Lecture Slides of Multimedia Signal Processing which includesVector, Alpha Processor, Single Issue, Copper Interconnect, Microprocessor, Processor Using Multiple, Copper Interconnects, Interconnect, Embedded etc. Key important points are: Stream Based, Memory Addressing Organization, Reconfigurable Computing, Structured Memory Access, Application–Specific Address Generator, Address Generation Unit, Generic Address Generator, Computational Processor, Memory Access Processor, Neuma
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Memory Addressing Organization for
Stream-Based Reconfigurable Computing
Outline – Smart Adress Generator
1. Structured Memory Access (SMA) Machine (1983)
2. Application–specific Address Generator (ASAG)
3. Address Generation Unit (AGU) (1991)
4. GAG (generic address generator) (1990)
5. GAG of MoM-2 (1991)
6. GAG of MoM-3 (1993~1999)
MAP Internal Organization
Write Queue
Read Queue
OIB
Instruction Processor
Instruction Fetcher (PC)
Address Generator (IS) (AIT) (APT)
Memory Controller
Write Address and Data
Write Address
Data from CP
Data to CP
Read Address
Write Address
Operand Spec & MAP Instructions
CP Instruction Instruction
Address
Memory Reguests
Read Address
Branch Target
Table Data
Read Data
Application–specific Address Generator(ASAG) (1989)
- The needed address patterns are generated by a
dedicated counters or circuit transformations applied
to a counter output.
Logic Synthesis for Semi-Random Address Sequences
Address Generation Unit (AGU) (1991)
- an application specific address generation unit
for video signal processor (VSP), a specified DSP
- implementing a 2-level address generation with
window based memory access, without full slider
method.
- 3 AGUs running in parallel calculate the address
for external image memory
- Providing 17 addressing modes:
- a 2-D raster scan mode
- a block scan mode for spatial filtering
- 8 variants of a neighborhood search mode
- a 2-D indirect access mode for external
image memory
- a FFT mode and an affine transformation mode
GAG (generic address generator) (1990)
MoM-1 (Map-oriented Machine 1)
- an image processing machine with 2-D memory
organization
- implement a pattern matching approach
- avoiding address calculation overhead
and fully parallelized pattern matching by
a a dynamically reconfigurable PLA (DPLA)
- address generator: move control unit (MCU)
- an application specific generic address
generator
- configured before execution time
- needs no memory cycles at run time
Reconfigurable R-ALU (PLD-based)
data sequencer
data memory
data
address
Instruction sequencer
Program memory
Hardwired ALU
Data
computer xputer
GAG (generic address generator) (1990)
The MoM xputer architecture
Mapping a Parallel Algorithm
2-D Filtering Example
- GAG of MoM-
GAG of MoM-3 (1993 ~ 1999)
- with Handle Position Generator (HPG) and
Memory Address Generator (MAG)
- similar as MoM-2 but improved with multiple
(up to 7) access patterns at the same time
Texas Instruments
TMS320C54x
DSP
Architecture and Data Addressing
Class presentation of EE201A
May 16, 2003