To implement Half adder by using basic and universal gates in pspice environment., Assignments of Electrical and Electronics Engineering

A half adder is a type of adder, an electronic circuit that performs the addition of numbers. The half-adder is able to add two single binary digits and provide the output plus a carry value. It has two inputs, called A and B, and two outputs S (sum) and C (carry). The common representation uses an XOR logic gate and an AND logic gate.

Typology: Assignments

2022/2023

Available from 04/03/2023

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EEE 1001: BASIC ELECTRICAL AND ELECTRONICS
ENGINEERING
BEE LAB(L57+L58)
L
AB
A
SSIGNMENT
10
Name: Gaurav Raj Reg.No: 20BEE0394
Faculty: Dr. Ravi K Date- 21.3.23
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EEE 1001: BASIC ELECTRICAL AND ELECTRONICS

ENGINEERING

BEE LAB(L57+L58)

LAB ASSIGNMENT 10

Name: Gaurav Raj Reg.No: 20BEE

Faculty: Dr. Ravi K Date- 21.3.

EXPERIMENT 10: Design of Half Adder Circuit using gates

Aim:

To implement Half adder by using basic and universal gates in pspice envirnment.

Apparatus/Tool required:

  • Computer with Pspice
  • Digclock/Source
  • XOR gate(7486 gate)
  • AND gate(7408 gate)

Circuit Diagram:

Simulation Circuit and output:

A B S=AB C=A.B

Truth Table

Manual Calculations: