University of Florida EEL 3701— Spring 2002 Dr. Eric M. Schwartz
Department of Electrical & Computer Engineering Revision 0 Professor in ECE
Page 1/1 Lab 7: Traffic-Light Controllers, an Example State Machine 18-Mar-02 6:40 PM
OBJECTIVES
To design a traffic control ASM and to implement this
state machine using a CPLD. You will design and
construct a traffic light controller for this laboratory.
MATERIALS
Debounced switch circuit (from previous labs), switches
circuits, LED circuits, and 7032 Breakout board
SPECIFICATIONS
Design a state machine to control the traffic lights at the
intersection of a main street and a cross street. To reduce
the number of LEDs needed in lab, you only need to
control the light outputs for the main street, not the cross
street. The traffic light controller has three active -low
outputs (Red, Yellow, Green), and two active-high
inputs: Car Waiting at cross street (CW)
and Emergency Vehicle approaching (EV).
Figure 1. Traffic Light
4 lane main street
2 lane
cross street
Traffic
light
TIMING:
1. Main Street green light normally stays on for 3 cycles.
However, if an emergency vehicle comes up to the
light (while traveling down the cross street), EV will
go true and this can occur during any of the 3 green
cycles. If this occurs, the light should immediately
turn yellow and stay on for at least one clock cycle
and then proceed on to step #4. Else, if EV is not true
after the three cycles, move to step #2.
2. After the Main Street green light has been on for 3
cycles, check if CW is true. If so, then continue to
step #3; else go back up to step #1.
3. Green turns off and Yellow turns on. This lasts
for one clock cycle.
4. Yellow turns off and Red turns on for two
clock cycles.
5. If EV is not true, go back to step #1. Otherwise, if EV
is true, then keep the light Red for at least one cycle.
PRE-LAB REQUIREMENTS
1. Draw an ASM chart for your controller.
2. Create a next-state logic table showing the current
state, input, next state, flip flop inputs and system
outputs (i.e. red, green or yellow) for each state in
your ASM diagram.
3. Create a design using D-Flip Flops and logic gates
using MaxPlusII (for implementation in the 7032). You
will use external switches and LEDs for the
implementation.
4. Simulate this design in MaxPlusII.
5. Repeat the design using a T flip-flop for the most
significant bit, a JK-flop for the next lower state bit
and a D flip-flop for the remaining lower state bits.
More columns should be added to the next -state logic
table to deal with the new choice of flip -flops.
6. Simulate this design in MaxPlusII.
Bring you ASM chart, next state truth table, design,
simulation print-outs to your lab. Also bring your designs
on floppy to your lab.
IN-LAB
1. Use the debounced switch for your clock input (as
discussed used in previous labs).
2. Implement and demonstrate you first design for your
TA using the 7032 breakout board, switches and
LED’s.
3. If the first design works, you should simply have to
load in the second design (to the 7032) and use the
same inputs and outputs as the first design to show
that you second design also works properly.
Implement and demonstrate your second design.