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Virtual Memory (VM)
CIT 595
Spring 2007
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CIT 595
Motivation for Virtual Memory
• A
process
is an instance of a computer program that is
being executed• Monoprogramming
¾^ One process in memory at a time runs till completion ¾^ With OS as supervisor
- What if process address space is larger than PhysicalMain Memory (DRAM)?
¾^ Process Address space is 0 to 2
n- where n = machine size
¾^ Main memory is temporary storage not made as big as processaddress space ¾^ Instead your program is usually stored on some form ofpermanent storage (disk or tape) Why not just make main memory large enough?
- Due to Memory Technology – cost, speed and capacity factors
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Memory Comparison
- Full address space is quite large:
¾^ e.g. 32-bit address (with 1 byte storage ): ~4 GB
- Disk storage is ~300X cheaper than DRAM
¾^ 80 GB of DRAM: ~ $21,000 vs. 80 GB of disk: ~ $
- To access large amounts of data in a cost-effectivemanner, the bulk of the data must be stored on disk
1GB: ~$
80 GB: ~$
4 MB: ~$
Disk
DRAM
SRAM
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CIT 595
Original Motivation for VM
•^ IBM wanted one software suite for a family of System370 computers
¾^ Family line of computers is a suite of compatible designs forsame command set or ISA ¾^ Allowed customers to purchase a smaller system with theknowledge they could upgrade to larger system
•^ Allowing same program run on machines with differentmemory sizes
¾^ Earlier programmers had to do explicit memory management
- Idea was to create an illusion for a process that it hasmemory as big as its address space
¾^ Hence the
concept of Virtual Memory
i.e. memory appears to be
but isn't
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Big Picture: How VM works?
- Virtual Address (VA)
- Is the address generated by your program• Address range 0 to 2
n^ -
where n is machine width
- Physical Address (PA)
- Where the virtual address is physically stored in Main Memory(DRAM)• Address ranges from 0 to 2
m^ -
where m < n
Program's Logical
View(VM)
CodeHeap Stack
Physical/Main Memory
Note: Logicaladdress orderneed not bemaintained inphysical memory
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Big Picture: How VM works?
- Use the disk as an extension to main memory• Need some address mapping scheme which will tell uswhere the Virtual Address is actually located
¾^ Mapping need not preserve continuity of data in both physicalmemory and disk ¾^ Logical address is only from program's point of view
- Address Translation from is done by OS + hardware
Disk
MainMemory
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Uses of VM: Multiprogramming
Multiple
processes resident in main memory
- Can have many different active processes at thesame time
¾E.g. Word processor and paint application are beingsimultaneously used by the user
- Same program is run in different processes i.e.multiple instances of the same program
¾the program is the same i.e. the instructions
but
the data is
different ¾the program counters are different
active
part of the code and data of process is in
main memory^ ¾
Allocate more memory to process as needed
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CIT 595
Uses of VM: Multiprogramming (contd..)
- This gives an appearance to the user that differentprocesses are being executed at the same time• But in reality one process can be executing at a time perCPU
z^ This known as time-sharing the processor z^ O.S decides which processes gets the CPU based on ascheduling algorithm (more on this in chp 8)
Program 1
Program 2
MainMemory
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Address Translation using Page Table
•^
Information concerning the location of each page, ismaintained in a data structure called a
page table
¾^ Operating System (OS) maintains this data structure ¾^ The page table is placed in memory at a known location ¾^ The Virtual Page number is used as an offset into the table tofind which frame in Physical Memory is the data located
Note: Page Tableentries are equalto number ofpages to minimizesearch time
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Example
- A system has a virtual address space of 2
8 and a physical
address space of 2
- Further assume that each page has 32
words
¾^ A virtual address has 8 bits ¾^ Of the 8 bits, 5 bits are used for offset (
5 = 32 words)
¾^ Remaining 3 bits are used for Virtual Page Number (VPN) ¾^ Since physical memory address is 7 bits, 5 bits go to offset(offset part is never modified) and hence 2 bits are used forPage Frame Number(PFN)
14
5
5
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Example (contd..)
Virtual Address 13 is produced by the processor for aprocess, what is the Physical Address?
Physical Address = 1001101 (
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Keeping track of VA’s in Multiprogramming • Each program’s logical view is the same• Problem: Different processes use the same virtualaddresses• Solution: Each process has its
own
page table
-^ OS responsible
for
updating
page tables so that virtual
address spaces of different processes do not collide
Program's Logical View CodeHeap Stack
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Multiprogramming Environment
- The processes existent in the physical memory timeshare the CPU• When the OS switches between process, the
state
of
the existing process is saved before the new process isallowed to use the CPU
¾In addition to the program counter and registers, thepage table is also saved
- Instead of storing entire page table, only the addresswhere the first page table entry is located gets stored
¾When a new process gets the CPU, the OS loads thestate of the process ¾Like PC register is used to load the PC, the page tableaddress is loaded into an internal register called
Page
Table Pointer
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Overview of Paging Technique
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Valid Bit
- A bit is needed to indicate whether the page is in mainmemory or not ¾^
Use a valid bit like we used in cache ¾^
Valid bit = 1, means page is in physical memory
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Valid Bit (contd..)
- If valid bit is 0, then page is not in physical memory
¾This is known as an occurrence of
page fault
- When page fault occurs an exception is thrown and theOS intervenes
¾Job of the exception routine is to find the pagerequired from disk and put it in main memory ¾OS also maintains a data structure to record whereeach virtual page is stored on disk ¾This data structure can be part of the page table orbe a separate structure all together
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Using TLB Page
Frame #
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Modern Processor with Cache and Virtual Memory • Studied Cache and Physical memory interaction• Found Caches indexed using physical/main memoryaddress• But processor (CPU) generates a logical/virtualaddress• So then how does the whole memory system work?• Require Address Translation before Cache Lookup^ ¾
Problem: Involve a memory access itself (page tablelookup) ¾Solution: We know that page table entries can also becached. Hence use TLB to translate VA to PA and thenuse cache.
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Integrating Cache and VM
- Advantage of Integration:
CPU ¾Allows multiple processes to have blocks in cacheat same time ¾Access time for data is faster as we doing twoSRAM (TLB and Cache) lookups which is still fasterthan two DRAM (main memory)
Translationby TLB
Cache
MainMemory
VA
PA
miss
hit
data
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All Memory put together: Cache, TLB and Paging VM
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Effective Access Time (EAT)
- The performance of hierarchical memory ismeasured by its
effective access time
(EAT)
- EAT is a weighted average that takes into accountthe hit ratio and relative access times of successivelevels of memory• The EAT for a two-level memory is given by:
EAT =
H
×
Access Time for Level
i^ + (1-
H )
×
Access for Level
i+
¾H is the hit rate i.e. % time data is found in level
i
- This equation can be extended to any number ofmemory levels
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EAT Example I
Consider a system with a main memory access timeof 200ns supported by a cache having a 10ns accesstime and a hit rate of 99%.EAT = 0.99(10ns) + 0.01(200ns) = 9.9ns + 2ns =11ns
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EAT Example II
- Suppose a main memory access takes 200ns, thepage fault rate is 1%, and it takes 10ms to load apage from disk. We have:
EAT = 0.99(200ns + 200ns) 0.01(10ms) = 100, 396ns
- Note: There are two access to the mainmemory, one for page table lookup and theother to get the actual data• Having a TLB will alleviate EAT between mainmemory and disk to some extent
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Disadvantage of Paging Technique
• A
process may not need the entire range of
addresses contained within the page• Thus, there may be many pages containingunused fragments of memory• This known as
internal fragmentation
- The unused fragments could have allow moreprocesses to be existent in physical memory• But due to fixed size page constriction, the unusedfragments of the page cannot be freed up unlessthe page is replaced
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Paging Combined with Segmentation
- Modern systems employ combined paging andsegmentation• Take advantage of the best features of both byassigning fixed-size pages within variable-sizedsegments• Each segment has a page table. This means thata memory address will have three fields, one for thesegment, another for the page, and a third for theoffset.
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Paging Combined with Segmentation
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Advantages of VM
-^ Enhances performance by providing greater memorycapacity, without the expense of adding main memory•^ The programmer does not have to worry about addressspace i.e. illusion
of very large memory
¾^ The movement of data is transparent i.e. data between the twolevels are exchanged by O.S. without the knowledge of theuser
- To a process it appears as if it “owns” machine
¾^ Has private address space ¾^ Unaffected by behaviour of other processes
